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DTSTART:20260308T030000
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DTSTART:20261101T010000
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DTSTAMP:20260921T172835Z
UID:D45DA7BA-EE33-42F3-ACA4-A35D3F8627EC
DTSTART;TZID=America/Los_Angeles:20260930T160000
DTEND;TZID=America/Los_Angeles:20260930T180000
DESCRIPTION:A review will be presented on advanced packaging process engine
 ering. The following topic will be reviewed: (1) The differences between 2
 /2.5D (side by side chips) and 3/3.5 D packaging (stacked chips) drive the
  need for hybrid bonding which in which the chips are stacked by bonding b
 oth insulator to insulator and Cu to Cu with zero gap. (2) Convention ther
 mal compression bonding with Cu-solder-Cu bonds vs hybrid bonding with Cu-
 Cu and SiCN-SiCN bonds drives the need to control the surface chemistry on
  the nanoscale. (3) Hybrid bonding greatly improves thermal management and
  AI efficiency by removing heat transfer barriers and reducing interconnec
 t distance. (4) Hybrid and fusion bonding (insulator-insulator) can be use
 d for highly versatile heterogeneous integration for RF and silicon photon
 ics. Recent work from the literature and the Kummel lab will be presented 
 on new materials and processes for heat management and stress/warpage cont
 rol. Finally\, the potential for negative coefficient of thermal expansion
  (CTE) to control warpage in panel level packaging will be reviewed.\n\nTh
 e schedule is as follows:\n\n4-4.30 pm - Networking\n\n4.30-6 pm - Lecture
 \n\nSpeaker(s): Prof. Andrew Kummel\n\nAgenda: \n4-4.30 pm - Networking\n\
 n4.30-6 pm - Lecture\n\nBldg: Qualcomm Building Q Auditorium\, 6455 Lusk B
 lvd\, San Diego\, California\, United States\, 92121
LOCATION:Bldg: Qualcomm Building Q Auditorium\, 6455 Lusk Blvd\, San Diego\
 , California\, United States\, 92121
ORGANIZER:vaishnav.srinivas@gmail.com
SEQUENCE:11
SUMMARY:Chemical and Physical Processes Enabling the Transition from 2/2.5D
  to 3/3.5D Packaging
URL;VALUE=URI:https://events.vtools.ieee.org/m/578846
X-ALT-DESC:Description: &lt;br /&gt;&lt;p class=&quot;MsoNormal&quot;&gt;A review will be present
 ed on advanced packaging process engineering. &amp;nbsp\;The following topic w
 ill be reviewed: (1) The differences between 2/2.5D (side by side chips) a
 nd 3/3.5 D packaging (stacked chips) drive the need for hybrid bonding whi
 ch in which the chips are stacked by bonding both insulator to insulator a
 nd Cu to Cu with zero gap.&amp;nbsp\; (2) Convention thermal compression bondi
 ng with Cu-solder-Cu bonds vs hybrid bonding with Cu-Cu and SiCN-SiCN bond
 s drives the need to control the surface chemistry on the nanoscale.&amp;nbsp\
 ; (3) Hybrid bonding greatly improves thermal management and AI efficiency
  by removing heat transfer barriers and reducing interconnect distance.&amp;nb
 sp\; (4) Hybrid and fusion bonding (insulator-insulator) can be used for h
 ighly versatile heterogeneous integration for RF and silicon photonics.&amp;nb
 sp\; Recent work from the literature and the &lt;span class=&quot;il&quot;&gt;Kummel&lt;/span
 &gt; lab will be presented on new materials and processes for heat management
  and stress/warpage control. &amp;nbsp\;Finally\, the potential for negative c
 oefficient of thermal expansion (CTE) to control warpage in panel level pa
 ckaging will be reviewed.&lt;/p&gt;\n&lt;p style=&quot;text-align: justify\;&quot;&gt;The schedu
 le is as follows:&amp;nbsp\;&lt;/p&gt;\n&lt;p&gt;4-4.30 pm - Networking&lt;/p&gt;\n&lt;p&gt;4.30-6 pm 
 - Lecture&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;Agenda: &lt;br /&gt;&lt;p&gt;4-4.30 pm - Networking&lt;/p&gt;\n&lt;p&gt;4
 .30-6 pm - Lecture&lt;/p&gt;
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