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DTSTAMP:20260929T180047Z
UID:42C9B809-C274-42FA-9C01-3E3F6A60446F
DTSTART;TZID=America/Los_Angeles:20261112T160000
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DESCRIPTION:Co-packaged optics (CPO) are heterogeneous integration packagin
 g methods to integrate the optical engine (OE) which consists of photonic 
 ICs (PIC) such as the laser and photodiodes\, and the electrical engine (E
 E) which consists of the electronic ICs (EIC) such as the laser driver and
  transimpedance amplifiers (TiA). The advantages of CPO are: (a) to reduce
  the length of the electrical interface between the OE/EE (or PIC/EIC) and
  the ASIC\, (b) to reduce the energy required to drive the signal\, and (c
 ) to cut the latency which leads to better electrical performance. In the 
 next few years\, we will see more implementations of a higher level of het
 erogeneous integration of EIC and PIC with silicon photonics\, whether it 
 is for performance\, form factor\, power consumption or cost. The content 
 of this lecture is shown below.\n\n- Introduction\n- Data Centers\n- Optic
 al Transceivers\n- PIC and EIC\n- OBO (on-board optics)\, NPO (near-board 
 optics)\, CPO (co-packaged optics)\n- 3D Integration of the PIC and EIC\n-
  3D Heterogeneous Integration of ASIC Switch\, PIC and EIC\n- 3D Heterogen
 eous Integration of ASIC Switch\, PIC and EIC with Bridges\n- 3D Heterogen
 eous Integration of ASIC Switch\, EIC and PIC with Glass Packaging\n- CPO 
 with Silicon Photonics\n- Summary and Recommendations\n\nThe schedule is a
 s follows:\n\n4-4.30 pm - Networking\n\n4.30-6 pm - Lecture\n\nSpeaker(s):
  John Lau\n\nAgenda: \n4-4.30 pm - Networking\n\n4.30-6 pm - Lecture\n\nBl
 dg: Qualcomm Building Q Auditorium\, 6455 Lusk Blvd\, San Diego\, Californ
 ia\, United States\, 92121
LOCATION:Bldg: Qualcomm Building Q Auditorium\, 6455 Lusk Blvd\, San Diego\
 , California\, United States\, 92121
ORGANIZER:vaishnav.srinivas@gmail.com
SEQUENCE:10
SUMMARY:Co-Packaged Optics with Silicon Photonics for Chiplets Heterogeneou
 s Integration
URL;VALUE=URI:https://events.vtools.ieee.org/m/580003
X-ALT-DESC:Description: <br /><p class="MsoNormal">Co-packaged optics (CPO)
  are heterogeneous integration packaging methods to integrate the optical 
 engine (OE) which consists of photonic ICs (PIC) such as the laser and pho
 todiodes\, and the electrical engine (EE) which consists of the electronic
  ICs (EIC) such as the laser driver and transimpedance amplifiers (TiA). T
 he advantages of CPO are: (a) to reduce the length of the electrical inter
 face between the OE/EE (or PIC/EIC) and the ASIC\, (b) to reduce the energ
 y required to drive the signal\, and (c) to cut the latency which leads to
  better electrical performance. In the next few years\, we will see more i
 mplementations of a higher level of heterogeneous integration of EIC and P
 IC with silicon photonics\, whether it is for performance\, form factor\, 
 power consumption or cost. The content of this lecture is shown below.</p>
 \n<ul type="disc">\n<ul type="disc">\n<ul type="disc">\n<ul type="disc">\n
 <ul type="disc">\n<ul type="disc">\n<ul type="disc">\n<ul type="disc">\n<u
 l type="disc">\n<li class="MsoNormal">Introduction</li>\n<li class="MsoNor
 mal">Data Centers</li>\n<li class="MsoNormal">Optical Transceivers</li>\n<
 li class="MsoNormal">PIC and EIC</li>\n<li class="MsoNormal">OBO (on-board
  optics)\, NPO (near-board optics)\, CPO (co-packaged optics)</li>\n<li cl
 ass="MsoNormal">3D Integration of the PIC and EIC</li>\n<li class="MsoNorm
 al">3D Heterogeneous Integration of ASIC Switch\, PIC and EIC</li>\n<li cl
 ass="MsoNormal">3D Heterogeneous Integration of ASIC Switch\, PIC and EIC 
 with Bridges</li>\n<li class="MsoNormal">3D Heterogeneous Integration of A
 SIC Switch\, EIC and PIC with Glass Packaging</li>\n<li class="MsoNormal">
 CPO with Silicon Photonics</li>\n<li class="MsoNormal">Summary and Recomme
 ndations</li>\n</ul>\n</ul>\n</ul>\n</ul>\n</ul>\n</ul>\n</ul>\n</ul>\n</u
 l>\n<p style="text-align: justify\;">The schedule is as follows:&nbsp\;</p
 >\n<p>4-4.30 pm - Networking</p>\n<p>4.30-6 pm - Lecture</p><br /><br />Ag
 enda: <br /><p>4-4.30 pm - Networking</p>\n<p>4.30-6 pm - Lecture</p>
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