BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/New_York BEGIN:DAYLIGHT DTSTART:20260308T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20261101T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:EST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20261003T194916Z UID:8DF52A80-FBCC-4DA1-A01B-82560E4AF04C DTSTART;TZID=America/New_York:20261002T150000 DTEND;TZID=America/New_York:20261002T160000 DESCRIPTION:Abstract:\n\nResearch on hardware Trojans\, including detection methods\, has largely focused on digital circuits and behavior observable in the digital domain. Analog and mixed-signal circuitry poses a differen t problem: continuous-valued behavior\, shared infrastructure\, and proces s\, voltage\, and temperature (PVT) margins can conceal structured malicio us activity without producing a conventional specification failure. Althou gh prior work has exploited analog effects in hardware attacks\, analog-na tive and cross-domain Trojans remain comparatively underexplored.\n\nThe t alk traces how transistor-level analog mechanisms can produce system-level security consequences. Circuit studies demonstrate an all-analog\, supply -triggered Trojan that can manipulate ECG signals before digitization and a covert channel that modulates pre-existing supply harmonics. Two silicon -validated studies in a commercial 55-nm CMOS process then expose compleme ntary paths across the analog–digital boundary. One attack originates in the analog supply network\, encodes deterministic patterns within an ADC ’s effective noise envelope\, and activates digital payloads. The other uses a digitally controlled analog payload to modulate input-referred offs et and exfiltrate information through a nominally unidirectional sensor in put.\n\nTogether\, these studies show that functional and parametric compl iance alone cannot rule out adversarial use of analog behavior. They motiv ate treating analog front ends\, power networks\, data converters\, and I/ O as first-class security surfaces\, and developing defenses that combine security-focused analog validation\, PVT-aware interpretation\, and comple mentary off-chip and on-chip monitoring of shared infrastructure and analo g–digital interfaces.\n\nBio:\n\nTejasvi (Teju) Das is an Associate Prof essor in the Department of Electrical and Microelectronic Engineering at R ochester Institute of Technology and Director of the RF/Analog/Mixed-Signa l Laboratory ([RAMLab](http://www.rit.edu/ramlab)). Before joining academi a\, he spent 15 years in the semiconductor industry\, where he led technol ogy and product development for high-volume analog and mixed-signal ICs in sensing and audio applications\, with cumulative shipments exceeding 600 million units. He has been granted more than 180 U.S. and international pa tents. He received his Ph.D. in Microsystems Engineering from RIT.\n\nHis primary research area is analog and RF IC design\, with a focus on analog- domain hardware security\, biosensing\, and device–circuit–network co- design for neuromorphic computing. His work has been published in peer-rev iewed journals and conferences and recognized with two IEEE best-paper awa rds. He is a Senior Member of IEEE\, serves on the program committee of IE EE ISCAS\, and is Vice Program Chair of the IEEE Microelectronics Design & Test Symposium (MDTS).\n\nCo-sponsored by: Columbia University EE\n\nRoom : 1300\, Bldg: Mudd\, 500 W120th Street\, New York\, New York\, United Sta tes\, 10027 LOCATION:Room: 1300\, Bldg: Mudd\, 500 W120th Street\, New York\, New York\ , United States\, 10027 ORGANIZER:johnkym@ee.columbia.edu SEQUENCE:12 SUMMARY:The Analog Attack Surface: Analog-Native and Cross-Domain Hardware Trojans URL;VALUE=URI:https://events.vtools.ieee.org/m/580308 X-ALT-DESC:Description: <br /><p style="margin: 3.0pt 0in 3.0pt 0in\;"><str ong>Abstract:</strong></p>\n<p style="text-align: justify\; text-indent: . 25in\; margin: 3.0pt 0in 3.0pt 0in\;">Research on hardware Trojans\, inclu ding detection methods\, has largely focused on digital circuits and behav ior observable in the digital domain. Analog and mixed-signal circuitry po ses a different problem: continuous-valued behavior\, shared infrastructur e\, and process\, voltage\, and temperature (PVT) margins can conceal stru ctured malicious activity without producing a conventional specification f ailure. Although prior work has exploited analog effects in hardware attac ks\, analog-native and cross-domain Trojans remain comparatively underexpl ored.</p>\n<p style="text-align: justify\; text-indent: .25in\; margin: 3. 0pt 0in 3.0pt 0in\;">The talk traces how transistor-level analog mechanism s can produce system-level security consequences. Circuit studies demonstr ate an all-analog\, supply-triggered Trojan that can manipulate ECG signal s before digitization and a covert channel that modulates pre-existing sup ply harmonics. Two silicon-validated studies in a commercial 55-nm CMOS pr ocess then expose complementary paths across the analog&ndash\;digital bou ndary. One attack originates in the analog supply network\, encodes determ inistic patterns within an ADC&rsquo\;s effective noise envelope\, and act ivates digital payloads. The other uses a digitally controlled analog payl oad to modulate input-referred offset and exfiltrate information through a nominally unidirectional sensor input.</p>\n<p style="text-align: justify \; text-indent: .25in\; margin: 3.0pt 0in 3.0pt 0in\;">Together\, these st udies show that functional and parametric compliance alone cannot rule out adversarial use of analog behavior. They motivate treating analog front e nds\, power networks\, data converters\, and I/O as first-class security s urfaces\, and developing defenses that combine security-focused analog val idation\, PVT-aware interpretation\, and complementary off-chip and on-chi p monitoring of shared infrastructure and analog&ndash\;digital interfaces .</p>\n<p style="text-align: justify\; text-indent: .25in\; margin: 3.0pt 0in 3.0pt 0in\;">&nbsp\;</p>\n<p style="text-align: justify\; text-indent: .25in\; margin: 3.0pt 0in 3.0pt 0in\;">Bio:</p>\n<p style="text-align: ju stify\; text-indent: .25in\; margin: 3.0pt 0in 3.0pt 0in\;">Tejasvi (Teju) Das is an Associate Professor in the Department of Electrical and Microel ectronic Engineering at Rochester Institute of Technology and Director of the RF/Analog/Mixed-Signal Laboratory (<a href="http://www.rit.edu/ramlab" >RAMLab</a>). Before joining academia\, he spent 15 years in the semicondu ctor industry\, where he led technology and product development for high-v olume analog and mixed-signal ICs in sensing and audio applications\, with cumulative shipments exceeding 600 million units. He has been granted mor e than 180 U.S. and international patents. He received his Ph.D. in Micros ystems Engineering from RIT.<span style="mso-no-proof: yes\;"> </span></p> \n<p style="text-align: justify\; text-indent: .25in\; margin: 3.0pt 0in 3 .0pt 0in\;">His primary research area is analog and RF IC design\, with a focus on analog-domain hardware security\, biosensing\, and device&ndash\; circuit&ndash\;network co-design for neuromorphic computing. His work has been published in peer-reviewed journals and conferences and recognized wi th two IEEE best-paper awards. He is a Senior Member of IEEE\, serves on t he program committee of IEEE ISCAS\, and is Vice Program Chair of the IEEE Microelectronics Design &amp\; Test Symposium (MDTS).</p> END:VEVENT END:VCALENDAR