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PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
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TZID:Europe/Paris
BEGIN:DAYLIGHT
DTSTART:20270328T030000
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
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DTSTART:20261025T020000
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DTSTAMP:20261011T152301Z
UID:49E27983-EE84-48E0-8A60-C33249E030EC
DTSTART;TZID=Europe/Paris:20261203T140000
DTEND;TZID=Europe/Paris:20261203T150000
DESCRIPTION:Janhavi Giri\n\nPrincipal Architect and Technical Industry Lead
  for Semiconductor EDA Strategy at NetApp\n\nSpeaker(s): Janhavi Giri\, \n
 \nRoom: AMPHI 7\, Bldg: Télécom Paris\, 19\, place Marguerite Perey\, PA
 LAISEAU\, Ile-de-France\, France\, 91120
LOCATION:Room: AMPHI 7\, Bldg: Télécom Paris\, 19\, place Marguerite Pere
 y\, PALAISEAU\, Ile-de-France\, France\, 91120
ORGANIZER:patricia.desgreys@telecom-paris.fr
SEQUENCE:19
SUMMARY:Agentic AI for Semiconductor Design and Manufacturing: From Wafer D
 ata Workflows to Intelligent EDA Systems
URL;VALUE=URI:https://events.vtools.ieee.org/m/584359
X-ALT-DESC:Description: &lt;br /&gt;&lt;h1 class=&quot;&quot;&gt;&amp;nbsp\;&lt;/h1&gt;\n&lt;h1 class=&quot;title f
 ull--title leading-tight&quot; title=&quot;&quot;&gt;&lt;span class=&quot;align-middle&quot;&gt;Janhavi Giri
 &lt;/span&gt;&lt;/h1&gt;\n&lt;p style=&quot;margin: 0cm\;&quot;&gt;&amp;nbsp\;Principal Architect and Tech
 nical Industry Lead for Semiconductor EDA Strategy at NetApp&lt;/p&gt;\n&lt;p&gt;&lt;span
  id=&quot;OBJ_PREFIX_DWT2141_com_zimbra_url&quot; class=&quot;Object&quot; role=&quot;link&quot;&gt;&lt;/span&gt;
 &lt;/p&gt;
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