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DTSTAMP:20261015T184001Z
UID:63EE4901-4FC6-4E45-86D4-C248DE87F785
DTSTART;TZID=Europe/Zurich:20261023T140000
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DESCRIPTION:Intelligent & Perceptive Attack Counteraction for Next-Generati
 on Secure Chips – From Sensing to Learning\n\nPhysical security of next-
 generation silicon systems mandates major advances at their physical bound
 ary\, and hence in both on-chip sensing for attack detection and on-chip a
 ctuation for attack counteraction. This has recently motivated the investi
 gation of a new breed of on-chip sensor interfaces and actuators that can 
 inexpensively monitor continuously the chip environment\, gaining physical
  context awareness and capturing physical anomalies. This trend is progres
 sively fusing with relentless advances in inexpensive on-chip (AI) intelli
 gence\, which can oversee physical signals and events to orchestrate the o
 n-chip security ecosystem.\n\nIn this keynote\, the road towards ubiquitou
 s intelligent & perceptive hardware security countermeasures is illustrate
 d through the analysis of recent silicon demonstrations with unprecedented
  capabilities to perceive security events inexpensively\, and react to the
 m intelligently\, all the time (always-on). The new concept of hardware pa
 tching is also discussed where circuit flexibility is introduced to make s
 ilicon chips able to evolve over time and counteract newly discovered vuln
 erabilities through (machine) learning-based physical protection mechanism
 s. As key message\, hardware security requires advances at the crossroads 
 of sensor interfaces and AI inference/reinforcement learning with unpreced
 ented energy efficiency.\n\nSpeaker(s): \, Prof. Massimo Alioto\n\nRoom: E
  7\, Bldg: ETZ building\, ETH\, Gloriastrasse 35\, Zurich\, Switzerland\, 
 Switzerland\, 8006
LOCATION:Room: E 7\, Bldg: ETZ building\, ETH\, Gloriastrasse 35\, Zurich\,
  Switzerland\, Switzerland\, 8006
ORGANIZER:tkjang@ethz.ch
SEQUENCE:28
SUMMARY:Distinguished lecture by Prof. Massimo Alioto - Attack Counteractio
 n for Next-Generation Secure Chips 
URL;VALUE=URI:https://events.vtools.ieee.org/m/585678
X-ALT-DESC:Description: <br /><p><strong>Intelligent &amp\; Perceptive Atta
 ck Counteraction for Next-Generation Secure Chips &ndash\; From Sensing to
  Learning&nbsp\;</strong></p>\n<p class="MsoNormal"><span lang="EN-US" sty
 le="mso-ansi-language: EN-US\; mso-fareast-language: EN-US\;">Physical sec
 urity of next-generation silicon systems mandates major advances at their 
 physical boundary\, and hence in both on-chip sensing for attack detection
  and on-chip actuation for attack counteraction. This has recently motivat
 ed the investigation of a new breed of on-chip sensor interfaces and actua
 tors that can inexpensively monitor continuously the chip environment\, ga
 ining physical context awareness and capturing physical anomalies. This tr
 end is progressively fusing with relentless advances in inexpensive on-chi
 p (AI) intelligence\, which can oversee physical signals and events to orc
 hestrate the on-chip security ecosystem.</span></p>\n<p class="MsoNormal">
 <span lang="EN-US" style="mso-ansi-language: EN-US\; mso-fareast-language:
  EN-US\;">In this keynote\, the road towards ubiquitous intelligent &amp\;
  perceptive hardware security countermeasures is illustrated through the a
 nalysis of recent silicon demonstrations with unprecedented capabilities t
 o perceive security events inexpensively\, and react to them intelligently
 \, all the time (always-on). The new concept of hardware patching is also 
 discussed where circuit flexibility is introduced to make silicon chips ab
 le to evolve over time and counteract newly discovered vulnerabilities thr
 ough (machine) learning-based physical protection mechanisms. As key messa
 ge\, hardware security requires advances at the crossroads of sensor inter
 faces and AI inference/reinforcement learning with unprecedented energy ef
 ficiency.</span></p>
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