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VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20261112T120406Z
UID:625EEB61-1E7C-4B5A-B452-07D82C89AEDF
DTSTART;TZID=Asia/Kolkata:20261116T090000
DTEND;TZID=Asia/Kolkata:20261118T170000
DESCRIPTION:As India builds its semiconductor ecosystem\, the demand for sk
 illed talent in Assembly\, Test\, Marking &amp; Packaging (ATMP) is growing ra
 pidly. The IEEE Electronics Packaging Society (EPS) and the Electronics Se
 ctor Skill Council of India (ESSCI)\, in association with Manav Rachna Edu
 cational Institutions\, are hosting a three-day workshop to help close thi
 s skills gap.\n\nThe program combines expert-led lectures\, hands-on labs 
 and real-world case studies. It gives participants practical\, industry-re
 levant knowledge of semiconductor packaging\, from fundamentals to the lat
 est advances.\n\nWorkshop Highlights\n\n- Advanced Packaging &amp; Heterogeneo
 us Integration\n- Materials &amp; Reliability\n- Assembly &amp; ATMP Manufacturing
 \n- Design-Technology Co-Optimization (DTCO)\n- Emerging Trends &amp; Industry
  Landscape\n\nSpeaker(s): Dr Ashwini\, Dr. Umesh\, Dr. Rohin\, \n\nBldg: I
  Block Auditorium (Basement)\, Manav Rachna Institute Sector 42\, Faridaba
 d\, Haryana\, India\, 121010
LOCATION:Bldg: I Block Auditorium (Basement)\, Manav Rachna Institute Secto
 r 42\, Faridabad\, Haryana\, India\, 121010
ORGANIZER:aka.xli@outlook.com
SEQUENCE:48
SUMMARY:IEEE EPS - ESSCI SEMICONDUCTOR PACKAGING WORKSHOP 2026 - MRIIRS
URL;VALUE=URI:https://events.vtools.ieee.org/m/593364
X-ALT-DESC:Description: &lt;br /&gt;&lt;p dir=&quot;ltr&quot;&gt;As India builds its semiconducto
 r ecosystem\, the demand for skilled talent in &lt;strong&gt;Assembly\, Test\, M
 arking &amp;amp\; Packaging (ATMP)&lt;/strong&gt; is growing rapidly. The &lt;strong&gt;IE
 EE Electronics Packaging Society (EPS)&lt;/strong&gt; and the &lt;strong&gt;Electronic
 s Sector Skill Council of India (ESSCI)&lt;/strong&gt;\, in association with &lt;st
 rong&gt;Manav Rachna Educational Institutions&lt;/strong&gt;\, are hosting a three-
 day workshop to help close this skills gap.&lt;/p&gt;\n&lt;p dir=&quot;ltr&quot;&gt;The program 
 combines expert-led lectures\, hands-on labs and real-world case studies. 
 It gives participants practical\, industry-relevant knowledge of semicondu
 ctor packaging\, from fundamentals to the latest advances.&lt;/p&gt;\n&lt;p dir=&quot;lt
 r&quot;&gt;&lt;strong&gt;Workshop Highlights&lt;/strong&gt;&lt;/p&gt;\n&lt;ul dir=&quot;ltr&quot;&gt;\n&lt;li&gt;&lt;strong&gt;A
 dvanced Packaging &amp;amp\; Heterogeneous Integration&lt;/strong&gt;&lt;/li&gt;\n&lt;li&gt;&lt;str
 ong&gt;Materials &amp;amp\; Reliability&lt;/strong&gt;&lt;/li&gt;\n&lt;li&gt;&lt;strong&gt;Assembly &amp;amp\
 ; ATMP Manufacturing&lt;/strong&gt;&lt;/li&gt;\n&lt;li&gt;&lt;strong&gt;Design-Technology Co-Optim
 ization (DTCO)&lt;/strong&gt;&lt;/li&gt;\n&lt;li&gt;&lt;strong&gt;Emerging Trends &amp;amp\; Industry 
 Landscape&lt;/strong&gt;&lt;/li&gt;\n&lt;/ul&gt;
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