Synopsys seminar in Madrid

#IEEE #CEDA #Spain #Chapter #Synopsys #seminar #analog #custom #design #and #verification #digital #implementation #flow
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The Spain Chapter of the IEEE Council on Electronic Design Automation (CEDA) presents a seminar in Madrid given by Synopsys.

The topics are:

1) Analog custom design and verification (schematic-layout-simulation-physical verification and extraction) flows and tools.

2) Digital implementation flow: Synthesis and Place&Route flows and tools.


  Date and Time

  Location

  Hosts

  Registration


  • Date: 29 Jan 2018
  • Time: 10:00 AM to 05:00 PM
  • All times are (UTC+01:00) Madrid
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  • Calle Profesor José García Santesmases, 9
  • Madrid, Madrid
  • Spain 28040
  • Building: UCM: Facultad de Informática
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  • Starts 11 January 2018 01:00 PM
  • Ends 28 January 2018 10:00 AM
  • All times are (UTC+01:00) Madrid
  • No Admission Charge