RF Harmonic Oscillators Integrated in Silicon Technologies

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As one of the truly fundamental analog functions in any wireless/wireline application, the voltage-controlled oscillator keeps attracting a great deal of well-deserved attention. In this presentation, we will investigate the mechanisms of phase noise generation in harmonic oscillators, including some recently published general results, after which we will analyze both classical and emergent oscillator architectures, describing pros and cons for each. Various techniques to achieve a very wide oscillator tuning range will be illustrated as well.



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  • Date: 15 Feb 2019
  • Time: 10:00 AM to 12:00 PM
  • All times are (GMT-08:00) US/Pacific
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  • Qualcomm AZ-Auditorium (10155 Pacific Heights Blvd, San Diego, CA 92121)
  • San Diego, California
  • United States
  • Building: AZ

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  • Starts 01 February 2019 11:50 AM
  • Ends 14 February 2019 11:50 AM
  • All times are (GMT-08:00) US/Pacific
  • No Admission Charge


  Speakers

Professor Pietro Andreani

Biography:

Pietro Andreani received the M.S.E.E. degree from the University of Pisa, Italy, in 1988, and the Ph.D. degree from Lund University, Sweden, in 1999. Between 2001 and 2007, he was Chair Professor at the Center for Physical Electronics, Technical University of Denmark. From 2005 to 2014, he had a 20% position as analog/RF designer at Ericsson AB in Lund, Sweden. Since 2007, he has been Associate Professor at the Department of Electrical and Information Technology (EIT), Lund University, working in analog/mixed-mode/RF IC design. He has also been Head of the VINNOVA Center for System Design on Silicon, hosted by EIT, between 2014 and 2016. He has been a TPC member of ISSCC (2007-2012), is a TPC member of ESSCIRC (Chair of the Frequency Generation subcommittee since 2012, TPC chair in 2014) and RFIC, and Associate Editor of JSSC. He has been an IEEE SSCS Distinguished Lecturer since 2017. He has authored numerous papers on harmonic oscillators and phase noise, for which he has been elevated to IEEE Fellow in 2018.





Agenda

10:00am - 10:10am  Sign-in and networking

10:10am - 12:00pm  Seminar (with Q&A after seminar)