Jeff of Keysight

Jeff Demmin is the Semiconductor and Defense Project Manager at Keysight Technologies in Santa Rosa, CA. Previously he was a Senior Lead Scientist at Booz Allen Hamilton, where he worked on heterogeneous integration programs for DARPA and other government clients. Before that, he was with STATS ChipPAC, and he worked for over a decade at Tessera in corporate development and IP acquisition. His career started in semiconductor package design at National Semiconductor, and he has also served as the Editor-in-Chief of Advanced Packaging magazine. He has a Bachelor’s degree in Physics from Princeton and a Master’s degree in Materials Science from Stanford. He has been in the industry long enough that all of his patents have expired.

Rohit of IIT Ropar

Biography:

Rohit Sharma (M’07 – SM’15) received the B.E. degree in electronics and telecommunication engineering from North Maharashtra University, India, in 2000, the M. Tech. degree in systems engineering from Dayalbagh Educational Institutes, India, in 2003 and the Ph.D. degree in electronics and communication engineering from Jaypee University of Information Technology, India, in 2009. He worked as a Post-Doctoral Fellow at the Design Automation Lab at Seoul National University, Seoul, Korea from Jan 2010 to Dec 2010. He was a Post-Doctoral Fellow at the Interconnect Focus Centre at Georgia Institute of Technology, Atlanta, USA from Jan 2011 to Jun 2012. Dr. Sharma joined the department of electrical engineering at the Indian Institute of Technology Ropar in 2012, where he is currently an Associate Professor. All along his tenure at IIT Ropar, he has initiated activities in the area of Electronic Packaging. His current research interests include design of high-speed chip-chip and on-chip interconnects, Graphene based nanoelectronic devices and interconnects, Signal and Thermal integrity in high-speed interconnects and 3D ICs/packages and application of Machine Learning in advanced packaging and systems. He is also the coordinator of the Indo-Taiwan Joint Research Centre on Artificial Intelligence and Machine Learning at IIT Ropar. He is an Associate Editor of the IEEE Transactions on Components, Packaging and Manufacturing Technology and a Program Committee member in IEEE EPEPS and IEEE EDAPS. He has been the General Co-Chair of the IEEE EDAPS in 2018. He is the Co-Chair of the IEEE EPS Technical Committee on Electrical Design, Modeling, and Simulation and is a Senior Member of the IEEE.