Christian Enz of EPFL

New circuit techniques have been developed in the recent years to lower the temporal noise of CMOS image sensors (CIS) readout chains below the 1 e-rms barrier. The latter include high column amplification and correlated multiple sampling (CMS), combined with device optimization like in-pixel buried channel source follower or in-pixel open-loop gain. However, these achievements were usually obtained at the cost of a large pixel pitch and a lower fill factor. It is well-known that the 1/f noise originating from the in-pixel source follower becomes the dominant noise source after proper reduction of the thermal noise component using high column amplification or CMS. This talk presents some recent work that explores new ways to further reduce this 1/f noise contribution using exclusively circuits’ optimization techniques. The latter were demonstrated on a 4T pixel integrated in a 180 nm CIS CMOS process. The new pixels feature a 0.4 e-rms input-referred noise and a 185 µV/e- conversion gain with a pitch of 7.5 µm and a fill factor of 66%. This corresponds to a reduction of the RMS noise by a factor 2 and a conversion gain increase by a factor 2.2 compared to state-of-the-art pixels.

Biography:

Christian Enz, PhD, Swiss Federal Institute of Technology (EPFL), 1989. He is currently Professor at EPFL and Director of the Institute of Microengineering and head of the IC Lab. Until April 2013 he was VP at the Swiss Center for Electronics and Microtechnology (CSEM) in Neuchâtel, Switzerland where he was heading the Integrated and Wireless Systems Division. Prior to joining CSEM, he was Principal Senior Engineer at Conexant (formerly Rockwell Semiconductor Systems), Newport Beach, CA, where he was responsible for the modeling and characterization of MOS transistors for RF applications. His technical interests and expertise are in the field of low-power and low-noise analog and RF IC design, wireless sensor networks and semiconductor device modeling. Together with E. Vittoz and F. Krummenacher he is the developer of the EKV MOS transistor model and the author of the book "Charge-Based MOS Transistor Modeling - The EKV Model for Low-Power and RF IC Design" (Wiley, 2006). He is the author and co-author of more than 200 scientific papers and has contributed to numerous conference presentations and advanced engineering courses.