System Design Using DSP Hardware

#"System #Design #Using #DSP #Hardware" #by #Mr. #Jerry #Bellott.
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Design methodologies for systems, PCB’s, firmware, and software enable engineers to successfully achieve their design goals by following an appropriate plan. Products using DSP hardware and firmware algorithms present a variety of unique challenges. The talk covers types of DSP hardware currently used for low, medium, and high power applications (including solutions using multiple MAC’s) and design considerations engineers and managers need to take into account when planning product development using DSP’s.
The “System Design Using DSP’s” seminar covers:
• A review of common DSP Applications
• DSP hardware architectures used for low power, high performance, and multi-core products, including SOC platform solutions.
• ASIC solutions for unique applications including GPU’s.
• FPGA solutions using MAC IP and system modeling/VHDL code generation software for > 500 MACs in a single FPGA.
• Explains how quality is directly related to designing products that meet customer needs and expectations and completing projects on-time and within budget. Review of structured methodology concepts.
• Identification of unique development milestone considerations for using general purpose DSP’s including software development considerations, PCB analog and digital regions, LVDS controlled impedance, and DDR3 memory interface design considerations.
In addition, the talk describes the importance of positioning yourself for engineering innovation by planning continuing education on current technologies, standards, and practices to fuel creative thinking.


  Date and Time

  Location

  Hosts

  Registration



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  • Fairleigh Dickinson University
  • Teaneck, New Jersey
  • United States 07666
  • Building: Auditorium M105, Muscarelle Center
  • Click here for Map

  • Contact Event Host
  • Hong Zhao (201)-692-2350, zhao@fdu.edu; Yun Q. Sh, shi@adm.njit.edu; Howard Leach h.leach@ieee.org. Please come 20 minutes early and network.
  • Co-sponsored by School of Computer Sciences and Engineering, FDU
  • Starts 01 February 2011 11:00 PM UTC
  • Ends 21 February 2012 11:00 PM UTC
  • No Admission Charge






Agenda

Speaker: Mr. Jerry Bellott

Jerry Bellott is an electrical engineer with more than 25 years experience designing products for the computer, wireless, and telecommunication industries at AT&T Bell Labs and other companies. At Bell Labs, Mr. Bellott co-designed an X.25 data network access circuit that was deployed nationwide in 5ESS switches. He also co-developed the Definity PBX and AT&T PC product line components. In the wireless and DSP division, he designed IC evaluation PCB’s for cell phone and other wireless products. He designed a reference design board for the Sceptre GSM chipset, including the DSP1627F, the world’s first processor with on-chip flash memory. The board was used by Motorola while designing the StarTac, the first compact flip-top lid cell phone, and iDEN phones with built-in speakerphone features. He also contributed memory architectures (L1 and L2 cache plus main memory) for 3G multi-core SOC products, and wrote specifications for custom ASIC interfaces for a 2-way digital pager product that helped Lucent win a 2 year design and manufacturing contract. Mr. Bellott provided applications engineering support for the PALM VII wireless organizer using a Lucent mixed signal DSP. The PALM VII was the first wireless PDA internet appliance, with application icons and internet connectivity. Mr. Bellott won awards for outstanding product development, team leadership, and customer support while with Bell Labs.

In 2000, Mr. Bellott served as senior systems engineer at startup ViaGate Technologies in Bridgewater. ViaGate designed the world’s first fiber to the basement ATM switch with SONET fiber and VDSL interfaces. The switch provides digital video, internet access, and remote LAN bridging for up to 240 clients. ViaGate was later bought by VDSL innovator Tut Systems in 2001, which is now part of Motorola Inc. More recently, Mr. Bellott co-designed a 1-GHz, 64-MAC DSP circuit board at Valley Technologies using a MathStar IC. The board served as MathStar's primary customer IC demo and evaluation platform for a two years for wireless, satellite, medical imaging, and video processing. Mr. Bellott has since written white papers, project documentation, and test plans for PC, PowerPC, LAN and fibre channel SAN equipment, wireless products, and GUI’s for DSP analysis at a central NJ technology company. He has also written documentation for microwave HD video links and streaming video over LAN products at IMT, Inc. where his worked helped them win a major contract in 2009. As a private consultant at GT Digital, Mr. Bellott delivers seminars on design topics among his other duties.

Mr. Bellott earned an MSEE from Georgia Tech (1980) and a BSEE from West Virginia University (1979, cum laude). Mr. Bellott served as Vice Chair of the Princeton Chapter of the IEEE Signal Processing Society from 2008 to 2011.