[Legacy Report] Two day workshop on Analog IC Design - From Spec To Reality : vTools Events

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[Legacy Report] Two day workshop on Analog IC Design - From Spec To Reality

#Analog #IC #Design

Venue: Vasavi Engineering College, Ibrahimbagh, Hyderabad
The Circuits and Systems Chapter of IEEE Hyderabad Section organised a two day workshop on Analog IC Design - From Spec To Reality on 18 and 19 September 2014 in collaboration with Austria Microsystems(AMS) Hyderabad and Vasavi Engineering College. This workshop was completely conducted by Analog Design engineers of Austria microsystems. The following were the workshop faculty.

A.G. Krishna Kanth: A.G. Krishna Kanth received his Bachelors and Masters degrees from IIT Bombay with specialization in Microelectronics. He was the recipient of President of India Shankar Dayal Sharma Gold medal in 2002. He started his career in Texas Instruments India as an analog design engineer. He worked with QualcoreLogic heading the analog team, ensuring the success of many analog IPs. He started working for AMS from 2006 as Group Lead for the Analog design team and is currently heading all the analog product development activities in India. He has three patents and two IEEE publications. He is also pursuing his part-time PhD research work from IIIT Hyderabad. His research interests include Power management circuits, amplifiers, filters and precision analog circuits.
V. Veeresh Babu: V. Veeresh Babu received his B.E from Sant Longowal Institute of Engineering and Technology in 2000 and M.Tech from IIT Bombay in 2003. He worked as Analog Design engineer at QualcoreLogic. from 2003 to 2006. He started working for AMS from 2006 as Analog design engineer. He has a published patent, two IEEE publications and is the recipient of best paper award in VLSI design conference. He is currently working as a senior engineer in AMS and also pursuing his part-time PhD research work with BITS Hyderabad. His research interests include Battery management systems, high precision band gap references and analog signal processing.
Chandra Nyshadham: Chandra Nyshadham received his Bachelor of Engineering in Electronics from Andhra University, Vishakhapatnam, India, in 2004. He received his Master of Technology in VLSI Design from GGS Indraprastha University, New Delhi and was University Gold Medalist. From 2007 to 2010, he worked on integrated PLLs and CMOS I/Os at QualCoreLogic. He joined AMS in 2010 and is currently working as Staff engineer- Analog. His research interests include precision reference design, amplifiers and voltage regulators with special focus on EMC issues.
Harshitha Penmetsa: Harshitha Penmetsa started her career as analog layout engineer in QualcoreLogic in 2004, where she was responsible for many custom full-chip layouts. She joined AMS in the year 2006 and is currently heading the analog layout team. She is responsible for Custom Layout of ICs considering DRC, DFM, DFY, ESD and EMC requirements of the IC, all the way to the full transfer of GDSII to FAB. She graduated from department of Electronics and Communication Engg from JNTU Hyderabad.