Seminar on Secured Microchip Design to Countermeasure against Physical Hardware Attack
Banking, defence applications and cryptosystems often demand security features, including cryptography, tamper resistance, stealth, and etc., by means of hardware approaches and/or software approaches to prevent data leakages. The hardware physical attacks or commonly known as side channel attacks have been employed to extract the secret keys of the encrypted algorithms implemented in hardware devices by analyzing their physical parameters such as power dissipation, electromagnetic interference and timing information. In this talk, we shall provide an overview of the different cryptography algorithms. We will also present the side channel attacks, in particular the powerful Correlation Power Analysis (CPA) and Correlation Electromagnetic Analysis (CEMA) with a leakage model can be used to reveal the secret keys of the cryptosystems. Several of the current-art attack techniques will be shared in this talk. Two main approaches of countermeasure against CPA and CEMA attacks, i.e. Hiding and Masking, which usually known as hardware approach and algorithmic (DSP) approach will also be discussed in this talk. We will also present several effective countermeasure techniques based on these approaches to design a highly secured microchip.
Date and Time
- Date: 18 October 2017
- Time: 10:00 AM to 11:30 AM
- All times are Asia/Hong_Kong
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- DEPARTMENT OF ELECTRONIC ENGINEERING
- City University of Hong Kong
- Hong Kong, Guangdong
- Co-sponsored by City University of Hong Kong
Prof Bah-Hwee Gwee of School of EEE, Nanyang Technological University, Singapore
Secured Microchip Design to Countermeasure against Physical Hardware Attack
Bah-Hwee Gwee is currently an Associate Professor at the School of EEE, Nanyang Technological University, Singapore, where he has joined since 1999. He was the Assistant Chair (Students) of the School of EEE from 2010 – 2014 and currently the Assistant Chair (Outreach). He has worked in a number of projects amounting to more than USD 10mil of research grants. He is the principal investigator of a number of research projects include DSO, DRTech, MoE Tier-2, ASTAR PSF, ASEAN-EU University Network Programme, the Co-PI of DARPA project, NTU-Panasonic and NTU-Linkoping University research collaborations. His research interests include asynchronous circuit, microprocessor, digital signal processor, network-on-chip and class-D amplifier designs. He has 3 US patents granted, 3 provisional US patents and co-founded a start-up in 2005.
He was the Chair of IEEE Circuits and Systems (CAS) Society Singapore Chapter (2005, 2006, 2013 and 2016) and IEEE Distinguished Lecturer 2009-2010 and 2017-2018. He is currently DSP Technical Committee designate chairman of CAS Society and has involved in organizing a number of IEEE conferences including the General Co-chair of DSP 2018. He has also served as Associate Editors of a number of journals, including IEEE Transactions of Circuits and Systems I – Regular Papers (2012-2013), IEEE Transactions of Circuits and Systems II – Brief Express (2010-2011) and Journal of Circuits, Systems and Signal Processing (2007-2012). He was awarded Singapore Defence Technology Prize in 2016 for his team working on the hardware assurance project.
Enquiry: Dr. Ray C.C. Cheung, Department of Electronic Engineering, CityU
Tel: 3442 9849, Fax:3442 0562