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EE Seminar on "Advanced Memory Circuit Design" and "An Energy Efficient ECG Signal Processor for a Wearable Diagnostic Device"
Part I: "Advanced Memory Circuit Design"
Part II: "An Energy Efficient ECG Signal Processor for a Wearable
Diagnostic Device"
Date and Time
Location
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- IIT Kanpur
- EE
- Kanpur, Uttar Pradesh
- India 208016
- Building: ACES
- Room Number: DA229
Speakers
Dr. Sanjeev K Jain of TSMC Design Technology Canada
Advanced Memory Circuit Design
The memory subsystem, processor cores and application specific integrated
circuits enable a SOC designer to integrate all of them together to make a
single chip solution for any specific application. The area of memory
subsystem is typically 70% of the silicon area of the current day SOC and
it is expected to grow more than 90% in future. The mainstream memory
technologies such as static RAM (SRAM), dynamic RAM (DRAM) and flash
memory are the basic components of a memory subsystem. Since the cache
memory is an integral part of a memory subsystem, there is a need of
continuous improvement in the FinFET SRAM (cache memory) circuit design in
latest CMOS process technology nodes (7 nm and below). For low energy
dissipation, supply voltage scaling has been widely used in SOC design.
However, the SRAM cell design is the limiting factor in voltage scaling.
The read, write and hold-stability of a typical SRAM cell are highly
influenced by increased process variations at low VDD, resulting in lower
yield. We need to address the voltage scalability of a conventional SRAM
cell by innovating new SRAM cell that can be operated at lower supply
voltage. Also, there is a need of robust on-chip process variation
compensation circuits to improve read and write margin of SRAM design. On
the other hand, for the storage memory, there is a concern for the
scalability of DRAM/flash memory in future. There are various emerging
memory technologies under research such as phase change memory (PCM) and
resistive RAM (RRAM). The resistive RAM is a better option as it has read
bandwidth as NOR flash and storage capacity as NAND flash. This can be a
potential candidate to replace DRAM in future due to its improved read and
write time. However, RRAM design needs attention to improve its complex
forming/set/reset operation.
Biography:
Dr Sanjeev Kumar Jain is currently working as Principal Design
Engineer at TSMC Design Technology Inc., Canada. He completed his PhD and
M. Tech. from IIT Delhi. He has worked as an engineer in various
semiconductor companies such as NXP Semiconductor (Eindhoven,
Netherlands), Freescale Semiconductor (Noida, India), Virage Logic (Noida,
India) and Agere Systems (Bangalore, India).
Address:TSMC Design Technology Canada,
Dr. Sanjeev K Jain of TSMC Design Technology Canada
An Energy Efficient ECG Signal Processor for a Wearable Diagnostic Device
In general, most of the medical diagnostic devices are available in
hospitals. Recently, portable wearable medical diagnostic devices are
proposed to monitor the health of patients. During my Ph.D. thesis, I
mainly focused on designing an energy efficient ECG signal processor for
cardiovascular disease detection. We implemented our forward search region
based ECG processing algorithm in an energy efficient ASIC and
cardiovascular diseases are detected using Android application. However,
the ECG signal processor detects ECG features based on the cardiac
electrical activities. The echocardiography is used to diagnose the
cardiac contractility dysfunction and valvular diseases. But
echocardiography requires expensive equipment and is available in
hospital. There is a need of cheaper and easily available diagnostic tool
to detect cardiac mechanical activities. Recently, seismocardiography
(SCG) system is proposed to detect cardiac mechanical activities. However,
there are open issues to be addressed as biological meaning of SCG
features are not yet annotated by cardiologist.
Biography:
Dr Sanjeev Kumar Jain is currently working as Principal Design
Engineer at TSMC Design Technology Inc., Canada. He completed his PhD and
M. Tech. from IIT Delhi. He has worked as an engineer in various
semiconductor companies such as NXP Semiconductor (Eindhoven,
Netherlands), Freescale Semiconductor (Noida, India), Virage Logic (Noida,
India) and Agere Systems (Bangalore, India).
Address:TSMC Design Technology Canada,