Synopsys seminar in Barcelona

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The Spain Chapter of the IEEE Council on Electronic Design Automation (CEDA) presents a seminar in Barcelona given by Synopsys.

The topic is Analog custom design and verification (schematic-layout-simulation-physical verification and extraction) flows and tools.

• Date: 16 Jan 2018
• Time: 10:00 AM to 04:00 PM
• All times are (UTC+01:00) Madrid
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• Campus UAB, Carrer dels Til·lers, 08193 Cerdanyola del Vallès, Barcelona
• Barcelona, Cataluna
• Spain
• Building: IMB
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• Starts 11 January 2018 01:00 PM
• Ends 15 January 2018 04:00 PM
• All times are (UTC+01:00) Madrid
• No Admission Charge

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