[Legacy Report] SoC Design – Trends, Challenges and First Pass Success

#SoC #VLSI #Design #Reusable #IP #memory #software #DSP

Moore’s law scaling of sub-nanometer design process has enabled the integration of several million transistors with a variety of functionality as a System-On-Chip (SoC). The first generation of SoCs were designed with a single processor, DSP and a large number of reusable IP (Intellectual Property), memory software. The current generation of SoCs have multiple processors, multiple buses, analog components and a large amount of software.

I’ll present the trends and challenges in SoC Design. Will present some thoughts on complexity and provide some ideas for managing the complexity.  Will provide a motivation for first pass success and will present some practical approaches for verification. Will also present the Zen and Art of Debugging.  We will conclude with the practical ideas with a holistic view for getting it right.

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• Newark, New Jersey
• United States

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• Co-sponsored by NJIT, AP03/MTT17