Power Consumption Evaluation by Gem5 with Full-system DVFS and McPAT

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DVFS (Dynamic Voltage and Frequency Scaling) is a technique to reduce energy consumption of a computer system. A CPUfreq governor scales the frequency of system CPU, which in turn affects CPU power performance. Each governor has its own unique behavior, purpose, and suitability in terms of workload.

 

Computer architecture researchers commonly use software simulation to prototype and evaluate their ideas. The Gem5 simulator is a modular platform for computer-system architecture research, encompassing system-level architecture as well as processor microarchitecture. McPAT is the first integrated power, area, and timing modeling framework for multicore processors.

In this talk, We examine the power consumption of different Mibench benchmarks run under different CPUfreq governors, using Gem5 with full-system DVFS modeling and McPAT. MiBench used in the experiment is a free, commercially representative embedded benchmark suite, consisting of six categories including: Automotive and Industrial Control, Network, Security, Consumer Devices, Office Automation, and Telecommunications, which are C applications targeting specific areas of the embedded market. We chose one application from each of the six categories of applications for our study.

We describe how to choose a CPUfreq governor and run Mibench benchmark, how to derive the power consumption of each benchmark under each governor and discuss what kind of benchmark each governor is suitable for.



  Date and Time

  Location

  Hosts

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  • Date: 27 Oct 2017
  • Time: 04:15 PM to 05:00 PM
  • All times are (GMT-04:00) Canada/Atlantic
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  • Antigonish, NS, Nova Scotia
  • Canada



  Speakers

HL

Topic:

Dr. Haiying Liang

DVFS (Dynamic Voltage and Frequency Scaling) is a technique to reduce energy consumption of a computer system. A CPUfreq governor scales the frequency of system CPU, which in turn affects CPU power performance. Each governor has its own unique behavior, purpose, and suitability in terms of workload.

 

Computer architecture researchers commonly use software simulation to prototype and evaluate their ideas. The Gem5 simulator is a modular platform for computer-system architecture research, encompassing system-level architecture as well as processor microarchitecture. McPAT is the first integrated power, area, and timing modeling framework for multicore processors.

 

In this talk, We examine the power consumption of different Mibench benchmarks run under different CPUfreq governors, using Gem5 with full-system DVFS modeling and McPAT. MiBench used in the experiment is a free, commercially representative embedded benchmark suite, consisting of six categories including: Automotive and Industrial Control, Network, Security, Consumer Devices, Office Automation, and Telecommunications, which are C applications targeting specific areas of the embedded market. We chose one application from each of the six categories of applications for our study.

 

We describe how to choose a CPUfreq governor and run Mibench benchmark, how to derive the power consumption of each benchmark under each governor and discuss what kind of benchmark each governor is suitable for.