Ihsan Erdin of Celestica

High-speed circuit designers have long been aware of the limitations of decoupling capacitors due to parasitic effects. Be it from the package or the power transmission medium, the increasing capacitor impedance past its self-resonant frequency reduces its effectiveness as a noise suppressing agent. The parasitic inductance of the medium which is sometimes referred to as spread inductance has been studied and characterized with various models in the literature. While compact electrical models come in handy for circuit simulation, in practical layout applications which involve component placement and floor planning spatial parameters become more intuitive. In this vein, a new analysis technique will be presented to calculate the effectiveness of a decoupling capacitor based on its physical distance from a device power pin. The proposed method naturally extends to multiple power pins and capacitors including mutual coupling effects as will be demonstrated with examples.  

(Note: This presentation is based on speaker's practical experience and recent research with a target audience including SI/PI engineers and researchers. A balance will be observed between theory and practical applications.)

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