Keynote presentation on Energy Harvesting at PATMOS 2018 conference

#IoT #Keynote #Energy #Harvesting
Share

The Spain Chapter of the IEEE Circuits and Systems Society organizes a keynote presentation on Energy Harvesting at the PATMOS 2018 conference, given by the Chapter member Prof. Eduard Alarcon.

 



  Date and Time

  Location

  Hosts

  Registration



  • Date: 03 Jul 2018
  • Time: 09:30 AM to 10:30 AM
  • All times are (UTC+02:00) Madrid
  • Add_To_Calendar_icon Add Event to Calendar
  • Hotel Cap Roig
  • Platja d'Aro, Cataluna
  • Spain

  • Contact Event Host


  Speakers

Eduard Alarcon of UPC BarcelonaTech

Topic:

Vertical co-design and integration in Energy Harvesting: from device, circuit and system levels to IoT applications

The concept of harvesting ambient energy as an alternative power source for supplying integrated circuits aiming more miniaturized and distributed applications has been gaining momentum in the past years. A functional energy harvesting system, both in terms of available power and compatibility with system integration, requires concurrently addressing the energy transducing devices together with power management circuits. This talk will address first the state of the art in on-chip power management circuits specific for harvesters, particularly emphasizing tight joint characterization, modelling and circuit co-design of the energy transducing devices and the power management frontend integrated circuits. Then, a discussion on various prospective concepts will be presented. At device level, we will discuss (a) the use of nonlinear dynamics for enhanced harvesting and (b) exploring downscalability limits and the use of nanotechnology components. At system level, (c) distance and interference effects in resonant inductive coupling for active harvesting will be presented, as well as (d) exploiting the spatio-temporal correlation of the ambient energy field in wireless sensor networks to both dimensioning the temporal energy storage devices as well as assessing the scalability of the overall network capacity.

Biography:

Eduard Alarcón received the M. Sc. (National award) and Ph.D. degrees (honors) in Electrical Engineering from the Technical University of Catalunya (UPC BarcelonaTech), Spain, in 1995 and 2000, respectively. Since 1995 he has been with the Department of Electronics Engineering at the School of Telecommunications at UPC, where he became Associate Professor in 2000. From August 2003 to January 2004, July-August 2006 and July-August 2010 he was a Visiting Professor at the CoPEC center, University of Colorado at Boulder, US, and during January-June 2011 he was Visiting Professor at the School of ICT/Integrated Devices and Circuits, Royal Institute of Technology (KTH), Stockholm, Sweden. During the period 2006-2009 he was Associate Dean of International Affairs at the School of Telecommunications Engineering, UPC. He has co-authored more than 400 scientific publications, 7 books, 8 book chapters and 12 patents, and has been involved in different National, European (H2020 FET-Open, Flag-ERA) and US (DARPA, NSF) R&D projects within his research interests including the areas of on-chip energy management and RF circuits, energy harvesting and wireless energy transfer, nanosatellites, and nanotechnology-enabled wireless communications. He has received the Google Faculty Research Award (2013), Samsung Advanced Institute of Technology Global Research Program gift (2012), and Intel Honor Programme Fellowship (2014). He has given 30 invited, keynote and plenary lectures and tutorials in Europe, America, Asia and Oceania, was appointed by the IEEE CAS society as distinguished lecturer for 2009-2010 and lectures yearly MEAD courses at EPFL. He is elected member of the IEEE CAS Board of Governors (2010-2013), member of the IEEE CAS long term strategy committee, Vice President Finance of IEEE CAS (2015) and Vice President for Technical Activities of IEEE CAS (2016-2017, and 2017-2018). He was recipient of the Myril B. Reed Best Paper Award at the 1998 IEEE Midwest Symposium on Circuits and Systems. He was the invited co-editor of a special issue of the Analog Integrated Circuits and Signal Processing journal devoted to current-mode circuit techniques, a special issue of the International Journal on Circuit Theory and Applications, invited associate editor for a IEEE TPELS special issue on PwrSOC. He co-organized special sessions related to on-chip power management at IEEE ISCAS03, IEEE ISCAS06 and NOLTA 2012, and lectured tutorials at IEEE ISCAS09, ESSCIRC 2011, IEEE VLSI-DAT 2012 and APCCAS 2012. He was the 2007 Chair of the IEEE Circuits and Systems Society Technical Committee on Power Circuits. He is acting as general co-chair of DCIS 2017, Barcelona and IEEE ISCAS 2020, Seville. He was the General co-chair of the 2014 international CDIO conference, the technical program co-chair of the 2007 European Conference on Circuit Theory and Design – ECCTD07 and of LASCAS 2013, Special Sessions co-chair at IEEE ISCAS 2013. He served as an Associate Editor of the IEEE Transactions on Circuits and Systems – II: Express briefs (2006-2007) and Associate Editor of the Transactions on Circuits and Systems – I: Regular papers (2006-2012) and currently serves as Associate Editor Elsevier’s Nano Communication Networks journal (2009-), Journal of Low Power Electronics (JOLPE) (2011-) and in the Senior founding Editorial Board of the IEEE Journal on IEEE Journal on Emerging topics in Circuits and Systems, of which he is currently Editor-in-Chief (2018).