IEEE EMC Society Distinguished Lecturer Talk - The Myth about Ground

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Talk title: The myth about ground

GROUND is widely used in high-speed circuit modeling and simulation. However, there are a lot of misconceptions and misunderstandings about ground in the high-speed circuit industry. Does ideal ground really exist? If not, why do we use it in simulations? Should we connect the reference node of S-parameter model to ideal ground? Is ground bounce real and well defined? Should we put partial inductance and resistance on the ground net? What can we do or cannot do with S-parameter model? These questions are commonly asked by high-speed circuit designers. Answers from different people may be quite different and even contradictory. In this presentation, these questions will be answered with some simple, but powerful examples. At the end, the audience should have a better understanding about the ground and how to use it in high-speed simulations.


  Date and Time

  Location

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  • Date: 05 Dec 2018
  • Time: 06:00 PM to 08:30 PM
  • All times are (GMT-08:00) US/Pacific
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  • 10401 Roselle Street
  • Advanced Test Equipment Rentals
  • San Diego, California
  • United States 92121
  • Building: C
  • Room Number: Training Center
  • Click here for Map
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  • Starts 10 October 2018 09:26 AM
  • Ends 05 December 2018 02:26 PM
  • All times are (GMT-08:00) US/Pacific
  • 0 in-person spaces left!
  • No Admission Charge

  Speakers

Mr. Darryl Ray

Biography:

Darryl Ray is the founder and Principal Consultant for Darryl Ray EMC
Consulting. He has more than 40 years EMC experience working in the medical
device, ITE and defense industries. Mr. Ray received a Bachelor of Engineering
Technology degree from Wayne State University in Detroit, Michigan. Darryl has
performed engineering design testing and troubleshooting on over 100 products.
Mr. Ray has built 9 EMC labs including numerous anechoic chambers. He has
authored several papers for past IEEE EMC symposiums. Darryl is a senior member of the IEEE
and former chair of the IEEE Santa Clara Valley EMC chapter. He is an iNarte Certified Master
EMC Design Engineer. Mr. Ray is an active member of IEC TC62 SC 62A, Maintenance Team 23
pertaining to the development of IEC 60601-1-2. He is also a former member of the US national
committees for CISPR 11, 22, 24, 32 and 35.




Agenda

Dec. 5th Wed

6:00PM – 7:00PM, Dinner & Networking
7:00PM – 8:30PM: Presentation and Q&A