Lecture on PLL design for ICs

#PLL #microelectronics
Share

Kacper Urbanski (Silicon Creations, Cracow, Poland)

What does it mean that PLL operates in phase domain? What is phase noise? PI controller inside PLL. Where jitter comes from? What are the kinds of jitter (Period jitter, Cycle-to-cycle jitter, Long-term jitter, Time interval error). Delta-sigma dithering. 



  Date and Time

  Location

  Hosts

  Registration



  • Add_To_Calendar_icon Add Event to Calendar
  • AGH University of Science and Technology
  • Cracow, Malopolskie
  • Poland
  • Building: B1
  • Room Number: 121

  • Contact Event Host