VHDL Auto-Generation for Software Defined Radios
This paper describes a case study examining two distinct design processes for implementation of FPGA-based
software defined radio subsystems. We compare a traditional RTL design approach with a model-based design
flow involving automatic code generation using System Generator. Both design processes were applied to the
development of a common SATCOM waveform: Mil-Std-188-165a. Results indicate a 10:1 improvement in
development efficiency using System Generator, based on quantitative comparison of the time consumed in
developing system simulations, algorithm documentation, code design and debugging, hardware
implementation, and algorithm verification. The time savings associated with performance analysis using
hardware co-simulation is alsoassessed.
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- Eagle Rock Ave
- Hanover, New Jersey
- United States 07082
- Starts 04 October 2018 12:30 PM UTC
- Ends 04 October 2018 09:00 PM UTC
- No Admission Charge
Speakers
David Haessig
Biography:
David Haessig works on Waveform Products at BAE Systems, Wayne NJ. His group is engaged in
development of wireless communication, control, and avionics systems for military applications. He recently
served as the technical lead in BAE’s development of the Wideband Networking Waveform (WNW). Dr.
Haessig holds degrees in Mechanical Engineering from Lehigh University and in Electrical Engineering from
New Jersey Institute of Technology. He is a senior member of IEEE and an Adjunct Professor at NJIT where he
has taught courses in controls and mechatronics. He holds 4 patents in the area of inertial stabilization and has
24 technical and professional publications.