Three Days Workshop on “Advanced VLSI Design using Verilog HDL with Xilinx Vivado”

#Interfacing #PMODs #Xilinx #vivado
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Three Days Workshop on “Advanced VLSI Design using Verilog HDL with Xilinx Vivado”

Three day workshop on Advanced VLSI Design using Verilog HDL with Xilinx Vivado. III year ECE  24 students participated in the workshop, conducted in E- Block 303 LAB. The faculty co-ordinators are Mrs Amrita Sajja and Mr.Kiran kumar. 

Resource Person: Mr.Nagender, coreel and Applyvolt..

Date: 30/11/2018 to 02/12/2018.


  Date and Time

  Location

  Hosts

  Registration


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  • VENKATAPUR GHATKESAR
  • HYDERABAD, Andhra Pradesh
  • India 500088
  • Building: E BLOCK
  • Room Number: E BLOCK 303 lab
  • Contact Event Host

  • VENKATAPUR, GHATKESAR, MEDCHAL DIST., TELANGANA

  • Co-sponsored by ANURAG GROUP OF INSTITUTIONS
  • Survey: Fill out the survey

  Speakers

Mr. Nagender of Mr.Nagender, coreel and Applyvolt

Topic:

Three Days Workshop on "Advanced VLSI Design using Verilog HDL with Xilinx Vivado”

Three day workshop on Advanced VLSI Design using Verilog HDL with Xilinx Vivado. III year ECE  24 students participated in the workshop, conducted in E- Block 303 LAB. The faculty co-ordinators are Mrs Amrita Sajja and Mr.Kiran kumar.

Biography:

Mr.Nagender, coreel and Applyvolt..

Email:

Address:coreel and Applyvolt, , HYDERABAD, Andhra Pradesh, India, 500018




Agenda

30.11.2018 Day 1 Inaugural, Sessions

01.12.2018 Day 2 Sessions

02.12.2018 Day 3 Sessions, Valedictory


IEEE AGI CAS Chapter, Anurag Group of Institutions