Dr.Shree Prakash Tiwari

Organic field-effect transistors (OFETs) are receiving significant attention from device engineers because of their potential use in flexible electronics, such as drivers for flat-panel displays, smart pixels, and radio-frequency identification tags. The operational stability and contact resistance are very important parameters to be taken into account for designing high performance OFET devices. In this talk, firstly, the fabrication and characterization of high performance n-channel OFETs with solution processed organic semiconductor [6,6]-phenyl C61 butyric acid methyl ester ([60]PCBM) is comprehensively discussed. By varying the channel lengths in devices with different metal/semiconductor interfaces, the effect of channel length scaling is studied. The width-normalized contact resistance in the strong accumulation regime at high gate voltage is nearly independent of the choice of metal electrodes and in a range of 2.2 to 2.6 k*Ohm-cm. The bias stress instability can be modeled by a stretched exponential function fitted to either the threshold voltage shift or the drain-source channel current decay. Low voltage operation in OFETs is required to design electronic circuits with low power dissipation. HfO2 deposited by atomic layer deposition (ALD) is demonstrated as an excellent high-k gate dielectric material for achieving low voltage (3 V) operation in OFETs. The [60]PCBM OFETs employing HfO2 by ALD exhibited excellent n-channel performance with electron mobility values > 0.1 cm2/Vs, threshold voltage of ~0.3 V, and sub-threshold slope of 140 mV/dec. Selective doping near metal-semiconductor interface in pentacene OFETs to reduce the contact resistance will be briefly discussed in the last part of the talk.

Biography: Dr. Shree Prakash Tiwari is working as a Postdoctoral Research Fellow in
Kippelen Research Group at School of Electrical and Computer Engineering
at Georgia Institute of Technology, Atlanta, USA, since July 2008. He had
completed his Ph.D. in microelectronics at the Department of Electrical
engineering at IIT Bombay, Mumbai, India, in 2008. He worked as exchange
visitor for research at Nanyang Technological University, Singapore from
August 2005 to March 2006. Prior to Joining Ph.D. in 2003, he had received
M.Sc. in Electronics from D.D.U. Gorakhpur University, Uttar Pradesh,
India, and done a six month's industrial project at VLSI:FAB division at
Semiconductor Complex Ltd. (now Semiconductor Laboratory), Mohali, Punjab,
India. Dr. Tiwari's research interests are Device Physics, Organic
Electronics (mainly transistors), VLSI Technology and Microfabrication.
His current research work includes studying the performance of new organic
semiconductors in transistor devices and high-k gate dielectric materials
for low voltage operation and flexible electronics. He has contributed in
9 international conference presentations/papers, filed 1 patent, and
co-authored 12 journal publications in peer-reviewed journals

Address:Uttar Pradesh, India

Dr.Shree Prakash Tiwari

Biography:

Address:Uttar Pradesh, India