37th Annual Microelectronic Engineering Conference at RIT

#Microelectronic #Engineering #Education
Share

37th ANNUAL MICROELECTRONIC
ENGINEERING CONFERENCE at RIT
April 15-16, 2019


This is an annual conference event to showcase research projects investigated by undergraduates and graduate students in Microelectronic Engineering at RIT.  The full-day agenda includes invited speakers from industry and government agencies, as well as other universities.  This event is advertised in the Rochester region and is open to the public.  The IEEE EDS is a co-sponsor of the program.   



  Date and Time

  Location

  Hosts

  Registration



  • Date: 16 Apr 2019
  • Time: 08:00 AM to 05:00 PM
  • All times are (GMT-05:00) US/Eastern
  • Add_To_Calendar_icon Add Event to Calendar
  • Center for Integrated Manufacturing Studies
  • Rochester, New York
  • United States 14623
  • Building: Slaughter Hall
  • Room Number: 2210 - 2240

  • Contact Event Host
  • Starts 01 March 2019 08:00 AM
  • Ends 16 April 2019 10:00 AM
  • All times are (GMT-05:00) US/Eastern
  • No Admission Charge


  Speakers

Steven J. Koester of Electrical & Computer Engineering, University of Minnesota

Topic:

2D materials for a new generation of multi-functional devices

Two-dimensional (2D) materials are layered crystals, defined by strong intra-layer covalent bonds and
weak inter-layer van der Waals coupling, that possess many unique and interesting properties. In this
talk, I describe recent advancements on 2D materials, and discuss new device concepts in electronics,
photonics, spintronics and sensing, with a focus on applications where these materials can provide
improved performance or enable new functionality compared to conventional materials. Graphene is a 2D
sheet of sp2-bonded carbon atoms, and while it has limited usefulness for field-effect transistors, graphene
has applications in a wide range of other fields. Graphene is an excellent sensor material due to its high
surface sensitivity, and we have gone beyond conventional sensors and shown that this sensing capability
can be transduced into the wireless domain by utilizing the quantum capacitance effect. More recently,
we have shown that metal-oxide-graphene devices can be used to create atomically sharp “tweezers”
for trapping biomolecules such as DNA at voltages as low as 700 mV, making them suitable for integration
with CMOS readout circuits. We have also developed novel graphene-based spintronic devices, include
devices for hard drive read heads and low-power spin- neuromorphic computing architectures. 2D
semiconductors also have a multitude of uses as integrated electronic and photonic elements. In
particular, we have shown that MoS2, a transition metal dichalcogenide (TMD), is ideal for dynamic
random access memories (DRAMs), where the wide band gap and heavy effective mass make it an ideal
platform for ultra-low leakage access transistors. On the other hand, black phosphorus (BP), with its
narrow band gap and low effective mass is ideal for use in high-speed photodetectors, high-performance
MOSFETs and tunneling field-effect transistors.

Biography:

Dr. Koester received his Ph.D. in 1995 from the University of California, Santa Barbara. From 1997
to 2010 he was a research staff member at the IBM T. J. Watson Research Center and performed
research on a wide variety of electronic and optoelectronic devices, with an emphasis on those utilizing
the Si/SiGe material system. Since 2010, he has been a Professor of Electrical & Computer Engineering
at the University of Minnesota where his research focuses on novel electronic, photonic and sensing
device concepts with an emphasis on 2D materials. Dr. Koester has authored or co-authored over 250
technical publications, conference presentations, and book chapters, and holds 68 United States patents.
He is a Fellow of the IEEE.

Address:University of Minnesota, Electrical & Computer Engineering

Nathaniel C. Cady of Colleges of Nanoscale Science & Engineering, SUNY Polytechnic Institute

Topic:

Integration of hafnium oxide based ReRAM with CMOS for neuromorphic computing applications

Neuromorphic computing systems can achieve learning and adaptation in both software and
hardware. The human brain achieves these functions via modulation of synaptic connections
between neurons. Memristors, which can be implemented as resistive random access memory
(RRAM), are a novel form of non-volatile memory expected to replace a variety of current
memory technologies and enabling the design of new circuit architectures. These devices are a
prime candidate for so-called “synaptic devices” to be used in neuromorphic hardware
implementations. A variety of challenges persist, however, for integrating memristors with
CMOS, as well as for tuning device electrical performance. My research group has developed a
fully CMOS-compatible integration strategy for RRAM-based memristors on a 300mm wafer
platform, which can be implemented in both front end of the line (FEOL) and back end of the
line (BEOL) configurations. With regard to memristor performance, we are focusing on
strategies to reduce stochastic behavior during both binary and analog device switching. This is
a key metric for neuromorphic applications, as variability in device conductance state directly
influences the ultimate number of levels (weights) that can be implemented per synapse.

Biography:

Prof. Nathaniel Cady received his BA and PhD from Cornell University and has been a professor
at SUNY Polytechnic Institute (in Albany, NY) sine 2006. His research spans the fields of biology
and biosensors to nanoelectronics. His current work includes development of biosensors for
Lyme disease diagnosis and nanoelectronics hardware for neuromorphic systems.






Agenda

AGENDA
Tuesday April 16, 2019 – Center for Integrated Manufacturing Studies –CIMS
8:00 am Registration and Continental Breakfast, Upper Lobby – SLA Hall – 2210/2240
8:30 am Opening Remarks, Doreen Edwards, Dean of Kate Gleason College of
Engineering, RIT
Invited Talks Session Chair: Robert Pearson
8:40 am Single Electron Transistors for Molecular Computer Readout, Matthew
Filmer, Electrical Engineering, University of Notre Dame
9:10 am Demonstration of Record-High mm-Wave Power Performance using NPolar Gallium Nitride HEMTs, Brian Romanczyk, Electrical and Computer
Engineering Department, University of California Santa Barbara
9:40 am Coffee Break & Poster Session
10:10 am 2D materials for a new generation of multi-functional devices, Steven J.
Koester, Professor, Department of Electrical and Computer Engineering,
University of Minnesota
10:40 am “Tiger Stripes” – A model for resolving complex process interactions in the
pursuit of defect elimination, Chelsea Mackos, Director of Engineering, Solar
Cells & CIC, SolAero Technologies
11:10 am Super activation obtained by melt UV laser annealing of highly surfacesegregated dopants in high Ge content SiGe, Leonard M. Rubin, Chief Device
Scientist, Axcelis Technologies

Noon Luncheon, Louise Slaughter Hall 2220 - Dinosaur Barbeque

Invited Talks Session Chair: Santosh Kurinec
1:00 pm The RIT impact, Ken Way, Head of WW Business Development and Sales,
Xilinx
1:30 pm Integration of hafnium oxide based ReRAM with CMOS for neuromorphic
computing applications, Nathaniel C. Cady, Professor, Colleges of Nanoscale
Science & Engineering, SUNY Polytechnic Institute

Talks from RIT Microelectronic Engineering Students
Session Chair: Michael Jackson
2:05 pm Fabrication of AlGaN/GaN High Electron Mobility Transistors, Vijay Gopal Thirupakuzi Vangipuram
2:20 pm Fabrication of Photonic LPCVD Silicon Nitride Waveguides, Robert Dalheim
2:35 pm Fabrication of Sub-300nm Fins at RIT by SADP, Kelly Weiskittel
2:50 pm LivAbility Lab: Force and Position Monitoring System, Nicholas Petreikes
3:05 pm Afternoon Break & Poster Session

Session Chair: Sean Rommel
3:30 pm FeFET Fabrication and Characterization at RIT, Jordan Merkel
3:45 pm Transfer Process with 2-Dimensional Transitional Metal Dichalcogenides Materials, William Huang
4:00 pm Etching process characterization of Nitride layer and Poly silicon layer using TRION III Etcher, Sudmun Habib
4:15 pm Capping Layers for Increased Thermal Stability of IGZO Thin-film Transistor, Jason Konowitch
4:30 pm Biristor Array Investigation, Jeremiah Leit
4:45 pm Closing Remarks