Purushothaman Srinivasan of GLOBALFOUNDRIES, Malta, NY, USA *Also GLOBALFOUNDRIES Assignee, Pre-T0 IBM Alliance, Albany, NY, USA

In this era dominated by semiconductor products in consumer electronics space, apart from device area scaling, various functions need to be integrated in a chip. The need for such combined functionalities in a Low Power System-On-Chip (SoC) translates into dual trend (i) miniaturization of digital functions defined as “More Moore” and (ii) functional diversification called as “More-than-Moore” by International Technology Roadmap for Semiconductors (ITRS). This has now become a critical requirement of any semiconductor product. One such combined functional requirement would be to have analog and digital functions in a chip. This talk will discuss one of the key metric required for analog function – low frequency noise. Low-frequency noise has a significant impact on device reliability in analog domain in this functional diversification process (“More-than-Moore”). Low-frequency noise manifests primarily as flicker noise in Metal-Oxide-Semiconductor (MOS) devices and upconverts to phase noise in circuits. Flicker noise, also called as 1/f noise, is an important device metric towards RF and analog performance of low power circuits, such as operational amplifiers, mixers and oscillators. In addition, due to continued channel length scaling and oxide scaling (“More Moore”), this parameter is critical in mixed signal and digital applications as its affects signal-to-noise ratio and jitter. This discrete form of flicker noise, also called as Random Telegraph Signals (RTS), affects Static Random Access Memories (SRAMs), which limits its functionality. The first part of the talk will discuss the concept of flicker noise and RTS from a fundamental perspective. The basic method for characterizing flicker noise and its modeling methods will be shown. The impact of device layout, process and geometry affecting flicker noise will be discussed followed by its circuit implications. The role of RTS in advanced CMOS devices and their impact on SRAM bitcell will be discussed. Understanding of flicker noise variability is equally important as flicker noise itself. The second part of the talk will discuss this aspect in detail. The flicker noise variability due to die-to-die and wafer-to-wafer variation will also be discussed. The third part of the talk will discuss the circuit implications of flicker noise. In this context, the physics behind large signal cyclostationary noise under circuit operating conditions and their impact will be dealt with in detail. The impact of noise in operational amplifiers, voltage reference and oscillators will also be discussed. The talk will conclude with a real-time case study of how flicker noise at device level affects the phase noise of an oscillator circuit.

Biography: Dr. Purushothaman Srinivasan (SP) is a Member of Technical Staff (MTS) in the Device Reliability Group at GLOBALFOUNDRIES, Malta since Feb 2013. He is also a GLOBALFOUNDRIES assignee member of Pre-T0 alliance at IBM, Albany. From 2007-2013, he was a research staff member at Texas Instruments, Dallas. He is also an Executive Committee member and Membership Chair of Dielectric Science and Technology Division at ECS. His activities also include organizer for ECS graphene symposia and More-than-Moore symposia. He is also a liaison member of various SRC projects. Prior to joining TI, he obtained his PhD degree from IMEC, Leuven, Belgium and New Jersey Institute of Technology, Newark, NJ in 2007. He won the Hashimoto Prize for his best doctoral dissertation in 2007. He is also a senior member of IEEE, has edited 4 books, authored and co-authored more than 80 international publications, including IEDM and VLSI conferences. He also serves as a reviewer for at least 6 journals, including the Journal of The Electrochemical Society and IEEE Transactions on Electron Devices.

Email:

Address:GLOBALFOUNDRIES, Malta, NY, USA , , Malta, New York, United States, 12020

Purushothaman Srinivasan of GLOBALFOUNDRIES, Malta, NY, USA *Also GLOBALFOUNDRIES Assignee, Pre-T0 IBM Alliance, Albany, NY, USA

Biography:

Email:

Address:Malta, New York, United States