IEEE Swiss SSC Talks (Webinar) : Evolution of cellular RFICs (2G to 5G)

#Cellular #RF #Circuits
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Dear Members,

We hope all of you are doing well and healthy.

Our Swiss Solid State Circuit Society is please to host a Webinar from Dr. Venumadhav Bhagavatula.
Venu is Since 2014 with the Advanced Circuit Design group at Samsung Semiconductors Inc., San Jose, CA, USA.
He currently serves as a technical program committee member for the ISSCC.

The Webinar entitled :
Evolution of cellular RFICs (2G to 5G)
will be given over Webex

Meeting number:

590 654 710

Meeting password:

C4GaNc6sH9Q

Please Join at 17:30 - 17:35 mute your headset or microphone.

For the Q&A make sure to have  your headset or a proper microphone.


The Agenda is as follow:

17:30 - 17:40 Welcome participants Teleconference set-up

17:40 - 18:20 Lecture By Dr. Venumadhav Bhagavatula.

18:20 - 18:30 Questions / Discussion / Evenutal group picture

We look forward meeting you and having fruitful discussion.

Kind regards,

Mathieu Coustans for your IEEE Switzerland Solid State Circuit Society committee.


  Date and Time

  Location

  Hosts

  Registration


  • Date: 25 Jun 2020
  • Time: 03:30 PM UTC to 04:30 PM UTC
  • Add_To_Calendar_icon Add Event to Calendar
  • Online, Switzerland
  • Switzerland 5000
  • Contact Event Host
  • Co-sponsored by Switzerland Section Chapter SSC
  • Starts 30 April 2020 10:00 PM UTC
  • Ends 25 June 2020 02:00 PM UTC
  • No Admission Charge

  Speakers

Venu Venu of Samsung Semiconductors Inc

Topic:

Evolution of cellular RFICs (2G to 5G)

Cellular technology has witnessed five generations of evolution - the mobile UE-era ushered in by 2G (GSM/EDGE), to the future smart-phones that will be powered by the enhanced spectral efficiency of 5G. Each 'G' improved the user experience while introducing new hardware design challenges. I compare 2/3/4/5G system requirements, derive key TX/RX/LO circuit specifications, and highlight the differences in circuit topologies suited for these contrasting specifications. Using this framework, circuit techniques to handle a diverse range of problems such as low phase-noise oscillators, improved blocker tolerance, single-RB linearity will be introduced.

Biography:

Venumadhav Bhagavatula received the B.E. degree in electronics and communication from the University of Delhi, New Delhi, India, the M.Tech. degree in electronic design technology from the Indian Institute of Science, Bangalore, India, and the Ph.D. degree in electrical engineering from the University of Washington, Seattle, WA, USA, in 2005, 2007, and 2013. Since 2014 he has been with the Advanced Circuit Design group at Samsung Semiconductors Inc., San Jose, CA, USA. His research interests include RF/mm-wave and low-power mixed signal circuits. He currently serves as a technical program committee member for the ISSCC.

Email:

Address:California, United States