Noise in Deep-submicron CMOS Transistors
Abstract — During the early decades of their existence, MOS transistors were considered unsuitable for RF and low-noise applications due to their lower cutoff frequencies and higher noise, as compared to bipolar devices. With shrinking gate lengths, and cutoff frequencies in the upper millimeter wave frequency range, that perception began to change in the 1990s, with CMOS devices now becoming the workhorse for all but the most demanding of low-noise applications. A critical element in their widespread use in low-noise RF designs is the availability of CMOS device noise models. While the widespread use of CAD tools, some of them including noise models, gives the impression that things are well understood and under control, numerous difficulties exist. So-called “noise models†of CMOS devices often tend to be little more than empirical curve-fitting exercises; lack of robust parameter extraction methods prevents parametric studies based on experimental data; predictions of noise for devices with new (not merely scaled) designs is fraught with problems; and the impact of deep-submicron geometries on the high-frequency noise is still a subject of debate. This talk will trace the development of understanding in this area, and report the progress made on several fronts in CMOS noise investigation, including 1/f noise in the devices.
Date and Time
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- 161 Warren Street
- Newark
- Newark, New Jersey
- United States 07102
- Building: New Jersey Institute of Technology (NJIT), ECE Building
- Click here for Map
- Contact Event Host
- Dr. Ajay Kumar Poddar, Phone: (201)560-3806 (Email:akpoddar@ieee.org)
- Co-sponsored by MTT/AP-S, ED/CAS-S, Photonics, TMC
- Starts 28 January 2014 03:00 PM UTC
- Ends 20 March 2014 02:00 PM UTC
- No Admission Charge
Speakers
Prof. Madhu Gupta of San Diego State University
Noise in Deep-submicron CMOS Transistors
This talk will trace the development of understanding in this area, report the progress made on several fronts in CMOS noise investigation, including 1/f noise in the devices.
Biography:
Madhu S. Gupta is presently the RF Communications Systems Industry Chair Professor in Electrical Engineering at San Diego State University, where he also serves as the Director of the Communication Systems and Signal Processing Institute. Dr. Gupta has served as the Editor-in-Chief of IEEE Microwave and Guided Wave Letters and IEEE Microwave Magazine. Dr. Gupta has published over 100 writings, including journal articles, conference and invited papers, patents, book chapters, and reviews. He is the editor of Electrical Noise : Fundamentals and Sources (IEEE Press, 1977), Teaching Engineering : A Beginner's Guide (IEEE Press, 1987), and Noise in Circuits and Systems (IEEE Press, 1988), and is a Fellow of the IEEE. He was the President of IEEE Microwave Theory & Techniques Society during 2013.
Email:
Address:Professor of Electrical & Computer Engineering, San Diego State University, San Diego, California, United States
Prof. Madhu Gupta of San Diego State University
Noise in Deep-submicron CMOS Transistors
Biography:
Email:
Address:San Diego, California, United States
Prof. Madhu Gupta of San Diego State University
Noise in Deep-submicron CMOS Transistors
Biography:
Email:
Address:San Diego, California, United States
Prof. Madhu Gupta of San Diego State University
Noise in Deep-submicron CMOS Transistors
Biography:
Email:
Address:San Diego, California, United States
Prof. Madhu Gupta of San Diego State University
Noise in Deep-submicron CMOS Transistors
Biography:
Email:
Address:San Diego, California, United States
Agenda
6:15-7:15PM: Talk
Free dinner will be served at 5:45 PM. All are welcome. You don't have to be IEEE member to attend the talk.