IEEE seminar by Prof. Abhisek Dixit on "CAD Enabled Sub-10nm-FinFET Device Design"
It takes extensive capital expenditure on the order of USD 5-10B
to setup a 450-mm production line required to process 7nm CMOS devices,
and given the gaps in manufacturing equipment capabilities such as
unavailability of 157-nm lithography, it will not be feasible for the
industry to fabricate these devices in next 3-5 years. Even when such
fabrication facilities will come up, it will be fairly expensive to run
process lots through them. This is a scenario which puts TCAD in the
driving seat for a significant period of the technology development cycle.
Using TCAD, not only the in-depth device Physics can be studied, but also
the impact of device on power and performance of unit circuits can be
estimated, such as SRAM, DRAM, logic rings etc. In this talk, I will
discuss with help of examples on how TCAD is helping device designers gain
insight into FinFET device technology issues and some of the key findings
so far.
Date and Time
Location
Hosts
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- Department of Electrical Engineering
- Indian Institute of Technology Kanpur
- Kanpur, Uttar Pradesh
- India 208016
- Building: ACES Building
- Room Number: DA 229
- Contact Event Host
- Co-sponsored by Yogesh Singh Chauhan
Speakers
Prof. Abhisek Dixit
Biography:
Dr. Abhisek Dixit received the degree of Master of Technology from Indian
Institute of Technology Bombay in 2002. He joined Inter-university
Microelectronics Center (IMEC) Belgium in September 2002 and worked in
CMOS device research department as a research engineer. At the same time
he pursued his Doctoral degree at the Electrical Engineering department in
the Katholic University of Leuven (KUL). He graduated from KUL in 2007 and
joined the IBM-Semiconductor Research and Development Center (SRDC) in the
compact modeling group as an Advisory Research Engineer, where he focused
on RF MOSFET modeling and later worked as modeling lead for some of the
200-mm value added technologies including Bulk CMOS, BiCOMOS and SOI. He
moved to IBM’s 300mm server technology group in 2012 and led the 14 and
10-nm process and device TCAD calibration teams. Dr. Dixit joined
department of Electrical Engineering as an assistant professor in
Integrated Electronic Circuits group since October 2013. He has around 50
publications and 6 patents in FinFET technologies and is a senior member
of IEEE. His current research interests are device characterization and
modeling (TCAD and Compact) of high efficiency crystalline solar cells and
Sub-10nm CMOS devices, their thermal and other statistical effects
including variability and mismatch.
Address:Delhi, India
Prof. Abhisek Dixit
Biography:
Address:Delhi, India
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