Integrated Broadband Analog Delay Circuits - part I

#analog #filter #design #delay #broadband
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The humble analog delay is simple in principle but complicated in practice.  Analog delays are useful in analog filters, distributed amplifiers, and time-interleaved or pipelined analog signal processing.   Unfortunately, it can be quite tricky to delay a continuous-time broadband analog waveform without distortion on an integrated circuit!  Over the past two decades, our lab has repeatedly encountered the need for integrated broadband analog delays and has done much work on their implementation.  Now that CMOS technologies can readily process analog signals with 10’s of GHz of bandwidth, analog delays less than one nanosecond are being used in new and creative ways.  This talk reviews delay approximation and the implementation of delays from 10’s to 100’s of picoseconds having bandwidths up to 10’s of GHz.  Case studies are presented using the analog delay circuits in FIR and IIR filters for wireline transceivers and in high-speed data converters.


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  • Date: 10 Mar 2021
  • Time: 04:10 PM to 05:00 PM
  • All times are (GMT-05:00) US/Eastern
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  • Starts 01 March 2021 09:29 AM
  • Ends 10 March 2021 04:29 PM
  • All times are (GMT-05:00) US/Eastern
  • No Admission Charge

  Speakers

Anthony Chan Carusone Anthony Chan Carusone of University of Toronto

Biography:

Prof. Tony Chan Carusone has taught and researched integrated circuits and systems at the University of Toronto since completing his Ph.D. there in 2002.  He and his graduate students have received seven best-paper awards at leading conferences for their work on chip-to-chip and optical communication circuits, analog-to-digital conversion, and precise clock generation.  Prof. Chan Carusone was a Distinguished Lecturer for the IEEE Solid-State Circuits Society 2015-2017 and currently serves on the Technical Program Committee of the International Solid-State Circuits Conference.  He has co-authored the latest editions of the classic textbooks “Analog Integrated Circuit Design” along with D. Johns and K. Martin, and “Microelectronic Circuits” along with A. Sedra and K.C. Smith. He was Editor-in-Chief of the IEEE Transactions on Circuits and Systems II: Express Briefs in 2009, an Associate Editor for the IEEE Journal of Solid-State Circuits 2010-2017 and is now Editor-in-Chief of the IEEE Solid-State Circuits Letters.