IEEE SWISS SSC DISTINGUISHED LECTURE (WEBINAR) / All-Digital and Digital-Assisted Integrated Low-Dropout Regulators (LDOs) for Fine-Grained Spatiotemporal Power Management of Digital Load Circuits

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Dear Members,

We hope all of you are doing well and healthy.

Your Swiss Solid State Circuit Society chapter is please to host Prof. Arijit Raychowdhury from Georgia Tech, where he held the chair Motorola Solutions Foundation.

 

The video conferencing link will be provided on the day to registred attendees.

The topic of the lecture is : " All-Digital and Digital-Assisted Integrated Low-Dropout Regulators (LDOs) for Fine-Grained Spatiotemporal Power Management of Digital Load Circuits "

Please Join at 17:00 PM [CET] mute your headset or microphone.

We make a group picture in the begining for society report.

For the Q&A make sure to have your headset or a proper microphone.

The Agenda is as follow:

17:00 - 17:05 Welcome participants Teleconference set-up

17:05 - 18:00 Lecture

18:00 - 18:30 Questions / Discussion

We look forward meeting you and having fruitful discussion.

Kind regards,

Mathieu Coustans for your IEEE Switzerland Solid State Circuit Society committee.

 



  Date and Time

  Location

  Hosts

  Registration



  • Date: 03 Jun 2021
  • Time: 05:00 PM to 06:30 PM
  • All times are Europe/Zurich
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  • Zurich
  • Switzerland

  • Starts 05 May 2021 06:00 PM
  • Ends 20 May 2021 09:00 AM
  • All times are Europe/Zurich
  • No Admission Charge


  Speakers

Prof. Arijit Raychowdhury
Prof. Arijit Raychowdhury

Topic:

All-Digital and Digital-Assisted Integrated Low-Dropout Regulators (LDOs) for Fine-Grained Spatiotemporal Power Manageme

Fine grained spatiotemporal power management in digital processors and SoCs require embedded voltage regulators that are compact, energy-efficient, and able to operate over a large dynamic range. Linear regulators, including low dropout (LDO) regulators are the popular choice for on-die voltage regulation. Although analog LDOs have been used in supply sensitive load circuits over the years, there has been a recent resurgence in research and development of digitally assisted and all-digital LDOs targeted for digital load circuits. In some of these topologies, traditional design metrics such as power supply rejection, line and load regulation are often traded-off for higher energy efficiency, high performance under large current and voltage transients, as well as wide dynamic range of operation. In particular, the ability of digital topologies to regulate with ultra-low dropout voltages and down to the near threshold voltage (NTV) region have garnered significant interest. In this talk I will discuss recent advances in both circuit topologies and the corresponding control theoretical models of such LDOs. Emerging circuit topologies representing both all-digital and digitally assisted analog LDOs will be discussed. In the last part of the talk we will explore circuit topologies that unify voltage regulation and clocking circuits to provide and allow designers to reduce voltage guard-bands in digital circuits.

Biography:

Arijit Raychowdhury is currently the Motorola Solutions Foundation Professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology where he joined in January, 2013. He received his Ph.D. degree in Electrical and Computer Engineering from Purdue University (2007) and his B.E. in Electrical and Telecommunication Engineering from Jadavpur University, India (2001). His industry experience includes five years as a Staff Scientist in the Circuits Research Lab, Intel Corporation, and a year as an Analog Circuit Designer with Texas Instruments Inc. His research interests include low power digital and mixed-signal circuit design, design of power converters, sensors and exploring interactions of circuits with device technologies.

Dr. Raychowdhury holds more than 25 U.S. and international patents and has published over 80 articles in journals and refereed conferences. He serves on the Technical Program Committees of DAC, ICCAD, VLSI Conference, and ISQED and has been a guest associate-editor for JETC. He has also taught many short courses and invited tutorials at multiple conferences, workshops and universities. He is the winner of the Intel Labs Technical Contribution Award, 2011; Dimitris N. Chorafas Award for outstanding doctoral research, 2007; the Best Thesis Award, College of Engineering, Purdue University, 2007; Best Paper Awards at the International Symposium on Low Power Electronic Design (ISLPED) 2012, 2006; IEEE Nanotechnology Conference, 2003; SRC Technical Excellence Award, 2005; Intel Foundation Fellowship, 2006; NASA INAC Fellowship, 2004; M.P. Birla Smarak Kosh (SOUTH POINT) Award for Higher Studies, 2002; and the Meissner Fellowship 2002. Dr. Raychowdhury is a Senior Member of the IEEE.

Email:

Address:Klaus , United States, 2362