Benchmarking of Experimental Processor Becomes Computer Architecture Concept Worth Teaching

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A challenge to Air Force engineers was to design and develop a radiation-hardened microprocessor that embodied, at that time, a radical computer architecture. The requirements for space-borne processing called for designing a processor that, in addition to being rad-hard, fault-tolerant, and testable, would also achieve a high-level of performance. The measure of performance would come through the execution of a set of programs in a process called benchmarking. Experimental microprocessor designs impose limitations on benchmarking. Their fundamental novelty means that they have not yet incorporated many of the benchmarking support features found on fully developed machines. Benchmarking is considered premature without these support features; yet, once meaningful performance measurements are obtained, then resources for further microprocessor development can be turned to the most promising of the proposed designs. The team devised a work-around to the problem of benchmarking a microprocessor early in its design: they created within the benchmark programs software simulations of a specialized hardware structure. This virtualization of hardware by software "matured" the design to the point needed for realistic performance measurement.
These lessons have been transferred to a computer architecture course where the students mimic the same challenges that faced the Air Force team who confronted benchmarking experimental microprocessors. By carrying out the term project, the college students gain experiential knowledge of designing hardware - in software - for solving a practical problem that remains relevant today.

Approved for Public Release; Distribution Unlimited: PA 06-161 08MAR06

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Kevin A. Kwiat has been a civilian employee with the U.S. Air Force Research Laboratory (AFRL) in Rome, New York for over 30 years. He received the BS in Computer Science and the BA in Mathematics from Utica College of Syracuse University, and the MS in Computer Engineering and the Ph.D. in Computer Engineering from Syracuse University. He holds 4 patents. In addition to his duties with the Air Force, he is an adjunct professor of Computer Science at the State University of New York at Utica/Rome, an adjunct instructor of Computer Engineering at Syracuse University, and a Research Associate Professor with the University at Buffalo. He completed assignments as an adjunct professor at Utica College of Syracuse University, a lecturer at Hamilton College, a visiting scientist at Cornell University, and as a visiting researcher at the University of Edinburgh as part of the Air Force Office of Scientific Research “Window on Europe” program. He is an adviser for the National Research Council. He has been recognized by the AFRL Information Directorate with awards for best paper, excellence in technology teaming, and for outstanding individual basic research. His main research interest is dependable computer design.

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