Carlos Galup-Montoro of Electrical Engineering Department, Federal University of Santa Catarina, Florianópolis, Brazil

Essential to the design of CMOS circuits is an understanding of the transistor model and the meaning of its main parameters. Only three fundamental parameters are needed for the long channel transistor: the threshold voltage VT0, the specific current IS and the slope factor n. The long channel parameters can be directly extracted from the transconductance-to-current ratio (gm/ID) in the linear region. 

With the addition of the drain induced barrier lowering (DIBL) effect, the resulting four parameter model, is adequate for low voltage and acceptable for many standard supply voltage designs. The DIBL parameter can, in its turn, be directly extracted from the intrinsic gain of the common source amplifier.  

Finally, we will review ultra-low-power circuits, operating near the threshold condition, that allow the automatic extraction of the specific current IS and the threshold voltage VT0 of MOS transistors.

Biography:

Carlos Galup-Montoro, studied engineering sciences at the University of the Republic, Montevideo, Uruguay, and electronic engineering at the National Polytechnic School of Grenoble (INPG), France. He received the degree in electronics and the Ph.D. degree from INPG, in 1979 and 1982, respectively. From 1982 to 1989, he worked at the University of São Paulo, Brazil. Since 1990, he has been with the Electrical Engineering Department, Federal University of Santa Catarina, Florianópolis, Brazil, where he is currently a professor. In the second semester of the academic year 1997-1998, he was a Research Associate with the Analog Mixed Signal Group, Texas A&M University. He was a Visiting Scholar with UC Berkeley from 2008 to 2009 and with IMEP/INPG in the first trimester of 2017.

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