CIRCUIT DESIGNING- using NI multisim and ultiboard

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CIRCUIT DESIGNING- using NI multisim and ultiboard

IEEE VGEC SB presents the 3 days work shop on CIRCUIT DESIGNING- using NI multisim and ultiboard.

Dates: 18, 20, 21 September 2021

Timing: 1:30 PM to 5:00 PM(on 18 sept)

              11:00 AM to5:00 PM(on 20 & 21) 

Platform: Google meet

Fees Details:  55 rs. - For IEEE member

                      105 rs. - For Non-IEEE member

Registration link:

https://docs.google.com/forms/d/e/1FAIpQLSc_uTb8GuakrEP1tXFsQYxzAoyrrmFSkdDKoZTdekwvZPnuEg/viewform?usp=sf_link

Note: For payment contact our event coordinators mentioned below.


  Date and Time

  Location

  Hosts

  Registration


  • Start time: 18 Sep 2021 11:00 AM
  • End time: 21 Sep 2021 05:00 PM
  • All times are (UTC+05:30) Chennai
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  • Contact Event Host
  • Starts 12 September 2021 10:00 AM
  • Ends 17 September 2021 10:00 PM
  • All times are (UTC+05:30) Chennai
  • No Admission Charge

  Speakers

Prof. Vipul Patel Prof. Vipul Patel

Topic:

CIRCUIT DESIGNING- using NI multisim and ultiboard

Associate professor

PE department VGEC

Qualification: PE EDUCATION MASTERS




Agenda

Benefits of this event:

-This workshop will prove helpful for the students by enhancing their Skill regarding Designing Schematic diagrams and PCB for imdustrial standards.


For queries contact our event coordinators:

1. Naisargi Sharma: +91 88662 48911

2. Deepesh Chaturvedi: +91 85113 29802