Bonding Technology for the Next Generation Integration Schemes

#packaging #bonding #heterogeneous #integration
Share

Moore’s law is reaching its limits, advanced packaging has taken leadership to drive the race for IC performance. On the one hand, the die size is constantly reduced, so heterogeneous integration with high interconnect density becomes critical, especially for small package dimensions. For example, this is the case in IoT or mobile applications. Here, heterogeneous integration leads to an overall increased yield, mainly as smaller dies generally can be produced with higher yield. At the same time and most importantly, memory, processors, sensors and other dies from different sources can be combined using heterogeneous integration. The main drivers for heterogeneous integration using advanced packaging are the strong demand for low-power multichip mobile components, with constantly reduced lateral form factors. Various bonding processes are becoming essential to fulfill and enable new integration needs of new integration flows. Wafer bonding technologies such as dielectric-dielectric fusion, dielectric-metal hybrid bonding, collective die-to-wafer bonding, and oxide-free fusion wafer bonding will be presented.



  Date and Time

  Location

  Hosts

  Registration



  • Date: 24 Sep 2021
  • Time: 12:00 PM to 01:30 PM
  • All times are (GMT-05:00) US/Eastern
  • Add_To_Calendar_icon Add Event to Calendar
If you are not a robot, please complete the ReCAPTCHA to display virtual attendance info.
  • 257 Fuller Rd
  • Albany, New York
  • United States

  • Contact Event Hosts
  • Starts 20 September 2021 08:00 AM
  • Ends 24 September 2021 01:25 PM
  • All times are (GMT-05:00) US/Eastern
  • No Admission Charge


  Speakers

Jürgen Burggraf Jürgen Burggraf

Topic:

Jürgen Burggraf, Process Technology Manager, EV Group (Austria)

Biography:

Jürgen Burggraf started at EV Group (EVG) in 2007 as a Process Technology Engineer for wafer bonding applications. Currently Jürgen is the Process Technology Manager for wafer bonding and he is responsible for EVG’s worldwide process development for wafer bonding, such as temporary wafer bonding/debonding and permanent bonding. He holds an engineering degree in Bionic & Sensor Technology and a diploma degree in industrial engineering.