IEEE ComSoc NY Seminar: Algorithm and Hardware Co-Design for Energy-Efficient Deep Learning

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The IEEE Communications Society (ComSoc) promotes the advancement of science, technology and applications in communications and related disciplines. It fosters presentation and exchange of information among its members and the technical community throughout the world. The Society maintains a high standard of professionalism and technical competency. The IEEE Communications Society is a professional society of the IEEE.

The IEEE ComSoc New York Chapter is organizing a series of technical seminars for the New York area IEEE members and the general public. We invite researchers and professionals to share their latest work on a variety of topics in communications and related areas. This is the fifth seminar of the series. This time, we have the great pleasure to invite Prof. Yuan Bo from Rutgers University to talk about deep learning in low-power IoT application and embedded systems.

 



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  • Date: 30 Nov 2021
  • Time: 07:00 PM to 08:00 PM
  • All times are (GMT-05:00) US/Eastern
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Meeting ID: 819 0208 3808
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Meeting ID: 819 0208 3808
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  • Starts 20 September 2021 02:12 PM
  • Ends 30 November 2021 12:00 PM
  • All times are (GMT-05:00) US/Eastern
  • No Admission Charge


  Speakers

Bo Yuan Bo Yuan

Topic:

Algorithm and Hardware Co-Design for Energy-Efficient Deep Learning

In the emerging artificial intelligence era, deep neural networks (DNNs), a.k.a. deep learning, have gained unprecedented success in various applications. However, DNNs are usually storage intensive, computation intensive and very energy consuming, thereby posing severe challenges on the future wide deployment in many application scenarios, especially for the resource-constraint low-power IoT application and embedded systems. In this talk, I will introduce the algorithm/hardware co-design works for energy-efficient DNN in my group. First, I will show the use of low displacement rank (LDR) matrices and low-rank tensor can enable the construction of low-complexity DNN models as well as the corresponding energy-efficient DNN hardware accelerators. In the second part of my talk, I will show the benefit of using structured and unstructured sparsity of DNN for designing low-latency and low-power DNN hardware accelerators.

Biography:

Dr. Bo Yuan is currently the assistant professor in the Department of Electrical and Computer Engineering in Rutgers University. Before that, he was with City University of New York from 2015-2018. Dr. Bo Yuan received his bachelor and master degrees from Nanjing University, China in 2007 and 2010, respectively. He received his PhD degree from University of Minnesota, Twin Cities in 2015. His research interests include algorithm and hardware co-design and implementation for machine learning and signal processing systems, error-resilient low-cost computing techniques for embedded and IoT systems and machine learning for domain-specific applications. He is the recipient of Global Research Competition Finalist Award in Broadcom Corporation. Dr. Yuan serves as technical committee track chair and technical committee member for several IEEE/ACM conferences. He is the associated editor of Springer Journal of Signal Processing System.