Pr Said Hamdioui of TU-Delft

Emerging IoT-edge applications are extremely demanding in terms of storage, computing power and energy efficiency in order to enable the deployment of AI, hence generate the “information” locally rather than communication the data to e.g., the cloud. On the other hand, both today’s computer architectures and device technologies are facing major challenges making them incapable to deliver the required functionalities and features at economical affordable cost. In order for computing systems to continue deliver sustainable benefits for the foreseeable future society, alternative computing architectures and notions have to be explored in the light of emerging new device technologies.

Biography:

Hamdioui is currently Chair Professor on Dependable and Emerging Computer Technologies, Head of the Quantum and Computer Engineering department, and also serving as Head of the Computer Engineering Laboratory (CE-Lab) of the Delft University of Technology, the Netherlands. He is also co-founder and CEO of Cognitive-IC, a start-up focusing on hardware dependability solutions.

Hamdioui received the MSEE and PhD degrees (both with honors) from TUDelft. Prior to joining TUDelft as a professor, Hamdioui spent about seven years within industry including Microprocessor Products Group at Intel Corporation (Califorina, USA), IP and Yield Group at Philips Semiconductors R&D (Crolles, France) and DSP design group at Philips/ NXP Semiconductors (Nijmegen, The Netherlands). His research focuses on two domains: emerging technologies and computing paradigms (including memristors for logic and storage, in-memory-computing, neuromorphic computing, low power HW architecture for edge AI, etc.), and hardware dependability (including Testability, Reliability, Hardware Security).  He is currently involved in different projects

Hamdioui owns two patents, has published one book and contributed to other two, and had co-authored over 200 conference and journal papers. He has consulted for many companies (such as Intel, ST, Altera, Atmel, Renesas, …) in the area of memory testing and has collaborated with many industry/research partners (examples are Intel, IMEC, NXP, Intrinsic ID, DS2, ST Microelectronics, Cadence, Politic di Torino, etc) in the field of dependable nano-computing and emerging technologies. He is strongly involved in the international community as a member of organizing committees (e.g., general chair, program chair, etc) or a member of the technical program committees of the leading conferences. He delivered dozens of keynote speeches, distinguished lectures, and invited presentations and tutorial at major international forums/conferences/schools and at leading semiconductor companies. Hamdioui is a Senior member of the IEEE, Associate Editor of IEEE Transactions on VLSI Systems (TVLSI), and he serves on the editorial board of IEEE Design & Test, Elsevier Microelectronic Reliability Journal, and of the Journal of Electronic Testing: Theory and Applications (JETTA). He is also member of AENEAS/ENIAC Scientific Committee Council (AENEAS =Association for European NanoElectronics Activities).

Hamdioui is the recipient of many international/national awards. E.g., he  is the recipient of European Design Automation Association Outstanding Dissertation Award 2001; Best Paper Award at the International Conference on Frontier of Computer Science and Technology FCST-2017; Teacher of the Year Award at the faculty of Electrical Engineering, Delft University of Technology, the Netherlands; Best Paper Award at IEEE Computer Society Annual Symposium on VLSI (IVLSI) 2016; the 2015 HiPEAC Technology Transfer Award, Best Paper Award at 33rd IEEE International Conference on Computer Design ICCD 2015, Best paper Award at International conference on Design and Test of Integrated Systems in the nano-era DTIS 2011, IEEE Nano and Nano Korea award at IEEE NANO 2010, Intel informal Award for developed test methods for embedded caches in Itanuim processors. In addition, he is a leading member of Cadence Academic Network on Dependability and Design-for-Testability, and he was nominated for The Young Academy of the Royal Netherlands Academy of Arts and Sciences (KNAW) in 2009.

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Dr HDR Andreia Cathelin of STMicroelectronics

This talk will first present how the IEEE and more specifically the SSCS society is including young scientists and supporting them in their career growth. We will then discuss about one of the multinational semiconductor companies in Europe, STMicroelectronics, its fields of activity and the sustained Research and Development ecosystem that is fostered. A more specific example will be given related to FD-SOI CMOS technologies, and its design research ecosystem.

Biography:

Andreia Cathelin (M’04, SM’11) started electrical engineering studies at the Polytechnic Institute of Bucarest, Romania and graduated with MS from the Institut Supérieur d’Electronique du Nord (ISEN), Lille, France in 1994. In 1998 and 2013 respectively, she received PhD and “habilitation à diriger des recherches” (French highest academic degree) from the Université de Lille 1, France.

Since 1998, she has been with STMicroelectronics, Crolles, France, now Technology R&D Fellow. Her focus areas are in the design of RF/mmW/THz and ultra-low-power circuits and systems. She is the key design scientist in the promotion of all advanced CMOS technologies developed in the company.

She is leading and driving research in advanced topics inside the company R&D program and through leadership cooperation with major universities around the world. She has also management activities as being in charge of the ST-CMP operation (the CMP is an independent organization offering small series foundry services for SME and research institutes).

Andreia is very active in the IEEE community since more than 15 years, strongly implied with SSCS and its Adcom, the Executive Committees of ISSCC and VLSI Symposium and has been the TPC chair of ESSCIRC2020 and 2021 in Grenoble. She is as well a founding member of the IEEE SSCS Women in Circuits group.

Andreia has authored or co-authored 150+ technical papers and 14 book chapters, has co-edited the Springer book “The Fourth Terminal, Benefits of Body-Biasing Techniques for FDSOI Circuits and Systems” and has filed more than 25 patents.

Andreia is a co-recipient of the ISSCC 2012 Jan Van Vessem Award for Outstanding European Paper and of the ISSCC 2013 Jack Kilby Award for Outstanding Student Paper. She is as well the winner of the 2012 STMicroelectronics Technology Council Innovation Prize, for having introduced on the company’s roadmap the integrated CMOS THz technology for imaging applications.

Very recently, Andreia has been awarded an Honorary Doctorate from the University of Lund, Sweden, promotion of 2020.

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