Mike Shuo-Wei Chen of University of South California

There are increasing interests in wideband and flexible waveform synthesis in modern communication systems. The key enabler in such a digital transmitter is a high performance digital-to-analog converter (DAC). This has motivated the design community to push the digital-to-analog converter (DAC) towards higher sampling rate (>GS/s) while achieving high dynamic range. Moreover, there is an emerging trend to design a DAC with high output power, i.e. a digital power amplifier (PA). In this talk, I will overview various digital-to-analog architectures and filtering techniques that push the envelope of DAC bandwidth, linearity and/or noise floor. A dual-rate hybrid DAC architecture is one such example. In addition, I will introduce an emerging digital PA architecture that aims for high power efficiency, namely sub-harmonic switching (SHS) PA. Validated by a series of silicon prototypes, the proposed DAC architectures show a promising path for future digital transmitter.

Biography:

Mike Shuo-Wei Chen is a Professor in Department of Electrical and Computer Engineering at University of Southern California. He received the B.S. degree from National Taiwan University, Taipei, Taiwan, in 1998 and the M.S. and Ph.D. degrees from University of California, Berkeley, in 2002 and 2006, all in electrical engineering.

As a graduate student, he proposed and demonstrated the asynchronous SAR ADC architecture, which has been adopted in industry today for low-power high-speed analog-to-digital conversion products. After joining USC in 2011, he leads an analog mixed-signal circuit group, focusing on high-speed low-power data converters, frequency synthesizers, RF/mm-wave transceiver designs, analog circuit design automation, bio-inspired computing, non-uniformly sampled circuits and systems. From 2006 to 2010, he worked on mixed-signal and RF circuits for various wireless communication products at Atheros Communications (now Qualcomm).

Dr. Chen was the recipient of Qualcomm Faculty Award in 2019, NSF Faculty Early Career Development (CAREER) Award, DARPA Young Faculty Award (YFA) both in 2014, Analog Devices Outstanding Student Award for recognition in IC design in 2006 and UC Regents’ Fellowship at Berkeley in 2000.  He also achieved an honorable mention in the Asian Pacific Mathematics Olympiad, 1994. Dr. Chen has been serving as an associate editor of the IEEE Solid-State Circuits Letters (SSC-L), IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), as well as a TPC member in IEEE Solid-State Circuits Society conferences, notably the IEEE International Solid-State Circuits Conference (ISSCC), IEEE Symposium on VLSI Circuits (VLSIC), and IEEE Custom Integrated Circuits Conference (CICC). He is currently serving as Distinguished Lecturer for IEEE Solid-State Circuits Society (SSCS).

Address:California, United States