Investigate RF power amplifier linearization benefits in EDA - including a comparison to hardware test

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IEEE North Jersey Section Co-sponsors the event


This webinar is intended for engineers who design RF frontends and RF power amplifiers and strive for the best possible error vector magnitude (EVM) performance. We will introduce a new joint solution for linearization developed together with Cadence.

Date: Wednesday, Dec 01, 2021

Time: 2:00 PM (EDT)

Duration: 1 hour

For login information and password, please register by clicking the online link: REGISTER



  Date and Time

  Location

  Hosts

  Registration



  • Date: 01 Dec 2021
  • Time: 02:00 PM to 03:00 PM
  • All times are (GMT-05:00) US/Eastern
  • Add_To_Calendar_icon Add Event to Calendar
  • Virtual Technical Webinar Meeting
  • Virtual, New Jersey
  • United States
  • Building: Virtual

  • Ajay Poddar (akpoddar@ieee.org), Edip Niver (edip.niver@njit.edu), Anisha Apte (anisha_apte@ieee.org)

  • Co-sponsored by IEEE North Jersey Section


  Speakers

Dr. Gent Paparisto Dr. Gent Paparisto of RF Solutions Architect, Cadence

Topic:

Investigate RF power amplifier linearization benefits in EDA - including a comparison to hardware test

This webinar is intended for engineers who design RF frontends and RF power amplifiers and strive for the best possible error vector magnitude (EVM) performance. We will introduce a new joint solution for linearization developed together with Cadence. The solution is based on the R&S®VSESIM-VSS solution which already enhances the capabilities of the Cadence® Visual System Simulator™ (VSS). Additional system-level performance insights are now available long before you have hardware available, using the extensive EDA simulation capabilities. Although RF frontends are highly non-linear when they are operated close to saturation for best energy efficiency, the new method we are introducing gives insights into capabilities and improvement using linearization to enable low signal distortion of the complete RF chain. R&S®VSESIM-VSS supports signal creation and analysis according to the latest 5G and Wi-Fi specifications; combining realistic standard-compliant signal performance investigation with linearization from the R&S VSE Direct DPD method shows what is possible in terms of signal purity and EVM. The webinar will include a demonstration in VSS related to real hardware as we compare linearization in the design tool VSS with the actual performance of the device tested with trusted R&S test and measurement instruments.

Biography:

Dr. Gent Paparisto is a Product Engineering Architect at Cadence Design Systems. He holds a Ph.D. degree in electrical engineering from the University of Southern California (USC), Los Angeles. Dr. Paparisto has extensive experience in systems engineering, covering a broad range of communication technologies as well as signal processing algorithms for wireless and wireline applications. He has led and participated in the design and implementation of several products for cellular and wireless systems. He is also experienced in the RF system design and analysis field, and he has contributed extensively to the development of AWR RF simulation tools. Dr. Paparisto has authored multiple publications in international journals and conferences, served on the technical program committees of various IEEE conferences, contributed to the 3GPP TSC GERAN standardization effort, and is a US patent holder.

Address:Cadence,

Dr. Florian Ramian Dr. Florian Ramian of Rohde & Schwarz

Topic:

Investigate RF power amplifier linearization benefits in EDA - including a comparison to hardware test

his webinar is intended for engineers who design RF frontends and RF power amplifiers and striving for the best possible error vector magnitude (EVM) performance. We will introduce a new joint solution for linearization developed together with Cadence. 

Biography:

Dr. Florian Ramian is a development engineer for signal and spectrum analyzers at Rohde & Schwarz. He has 20 years of experience as an RF engineer, including 15 years in test and measurement. He held several positions as an Application Engineer at Rohde & Schwarz, before moving into development. While completing his doctorate at the Technical University of Munich (Germany) he was engaged in automotive radar.





Agenda

Date: Wednesday, Dec 01, 2021

Time: 2:00 PM (EDT)

Duration: 1 hour

For login information and password, please register by clicking the online link: REGISTER