Outlook and Challenges of Electrostatic Discharge (ESD) Protection of Modern and Future Integrated Circuits

#ESD #Protection #MOS #Processing
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Electrostatic discharge (ESD) is one of the most prevalent threats to the reliability of electronic components. It is an event in which a finite amount of charge is transferred from one object (i.e., human body) to the other (i.e., microchip). This process can result in a very high current passing through the microchip within a very short period of time, and hence more than 35% of chip damages can be attributed to the ESD event. As such, designing on-chip ESD structures to protect integrated circuits against the ESD stress is a high priority in the semiconductor industry. The continuing advancement in MOS processing technology makes the ESD-induced failures even more prominent. In fact, many semiconductor companies worldwide are having difficulties in meeting the increasingly stringent ESD protection requirements for various electronics applications, and one can predict with certainty that the availability of effective and robust ESD protection solutions will become a critical and essential factor to the well-being and commercialization of modern and future electronics.
An overview on the ESD sources, models, protection schemes, and testing will first be given in this talk. This is followed by presenting the challenges of designing and realizing ESD protection solutions for integrated circuits in Si CMOS, Si BiCMOS, GaAs, GaN, and emerging technologies. Challenges and difficulties associated with the ESD design and optimization for these technologies will be addressed.


  Date and Time

  Location

  Hosts

  Registration



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  • 161 Warren St
  • Newark, New Jersey
  • United States 07102
  • Building: ECEC
  • Room Number: 202
  • Click here for Map

  • Contact Event Host
  • D. Misra, Ph: 973-596-5739, dmisra@njit.edu
  • Co-sponsored by AP01/MTT17 and NJIT
  • Starts 30 October 2014 02:00 PM UTC
  • Ends 20 February 2015 10:00 PM UTC
  • No Admission Charge


  Speakers

Juin J. Liou Juin J. Liou of University of Central Florida, Orlando, Florida, USA

Topic:

Outlook and Challenges of Electrostatic Discharge (ESD) Protection of Modern and Future Integrated Circuits

Electrostatic discharge (ESD) is one of the most prevalent threats to the reliability of electronic components. It is an event in which a finite amount of charge is transferred from one object (i.e., human body) to the other (i.e., microchip). This process can result in a very high current passing through the microchip within a very short period of time, and hence more than 35% of chip damages can be attributed to the ESD event. As such, designing on-chip ESD structures to protect integrated circuits against the ESD stress is a high priority in the semiconductor industry. The continuing advancement in MOS processing technology makes the ESD-induced failures even more prominent. In fact, many semiconductor companies worldwide are having difficulties in meeting the increasingly stringent ESD protection requirements for various electronics applications, and one can predict with certainty that the availability of effective and robust ESD protection solutions will become a critical and essential factor to the well-being and commercialization of modern and future electronics. An overview on the ESD sources, models, protection schemes, and testing will first be given in this talk. This is followed by presenting the challenges of designing and realizing ESD protection solutions for integrated circuits in Si CMOS, Si BiCMOS, GaAs, GaN, and emerging technologies. Challenges and difficulties associated with the ESD design and optimization for these technologies will be addressed.

Biography: Juin J. Liou received the B.S. (honors), M.S., and Ph.D. degrees in electrical engineering from the University of Florida, Gainesville, in 1982, 1983, and 1987, respectively. In 1987, he joined the Department of Electrical and Computer Engineering at the University of Central Florida (UCF), Orlando, Florida where he is now the UCF Pegasus Distinguished Professor and Lockheed Martin St. Laurent Professor of Engineering. His current research interests are Micro/nanoelectronics computer-aided design, RF device modeling and simulation, and electrostatic discharge (ESD) protection design and simulation.
Dr. Liou holds 8 U.S. patents (4 more filed and pending), and has published 10 books (3 more in press), more than 270 journal papers (including 18 invited review articles), and more than 220 papers (including more than 90 keynote and invited papers) in international and national conference proceedings. He has been awarded more than $14.0 million of research contracts and grants from federal agencies (i.e., NSF, DARPA, Navy, Air Force, NASA, NIST), state government, and industry (i.e., Semiconductor Research Corp., Intel Corp., Intersil Corp., Lucent Technologies, Alcatel Space, Conexant Systems, Texas Instruments, Fairchild Semiconductor, National Semiconductor, Analog Devices, Maxim Integrated Systems, Allegro Microsystems, RF Micro Device, Lockheed Martin), and has held consulting positions with research laboratories and companies in the United States, China, Japan, Taiwan, and Singapore. In addition, Dr. Liou has served as a technical reviewer for various journals and publishers, general chair or technical program chair for a large number of international conferences, regional editor (in USA, Canada and South America) of the Microelectronics Reliability journal, and guest editor of 7 special issues in the IEEE Journal of Emerging and Selected Topics in Circuits and Systems, Microelectronics Reliability, Solid-State Electronics, World Scientific Journal, and International Journal of Antennas and Propagation.
Dr. Liou received ten different awards on excellence in teaching and research from the University of Central Florida (UCF) and six different awards from the IEEE. Among them, he was awarded the UCF Pegasus Distinguished Professor (2009) – the highest honor bestowed to a faculty member at UCF, UCF Distinguished Researcher Award (four times: 1992, 1998, 2002, 2009) – the most of any faculty in the history of UCF, UCF Research Incentive Award (three times: 2000, 2005, 2010), UCF Trustee Chair Professor (2002), IEEE Joseph M. Biedenbach Outstanding Engineering Educator Award in 2004 for exemplary engineering teaching, research, and international collaboration, and IEEE Electron Devices Society Education Award in 2014 for promoting and inspiring global education and learning in the field of electron devices. His other honors are Fellow of IEEE, Fellow of IET, Fellow of AAAS, Fellow of Singapore Institute of Manufacturing Technology, Fellow of UCF-Analog Devices, Distinguished Lecturer of IEEE Electron Device Society (EDS), and Distinguished Lecturer of National Science Council. He holds several honorary professorships, including the Chang Jiang Scholar Endowed Professor of Ministry of Education, China – the highest honorary professorship in China, NSVL Distinguished Professor of National Semiconductor Corp., USA, International Honorary Chair Professor of National Taipei University of Technology, Taiwan, Chang Gung Endowed Professor of Chang Gung University, Taiwan, Feng Chia Chair Professor of Feng Chia University, Taiwan, and Chunhui Eminent Scholar of Peking University, China. Dr. Liou was a recipient of U.S. Air Force Fellowship Award and National University Singapore Fellowship Award.
Dr. Liou has served as the IEEE EDS Vice-President of Regions/Chapters, IEEE EDS Treasurer, IEEE EDS Finance Committee Chair, Member of IEEE EDS Board of Governors, and Member of IEEE EDS Educational Activities Committee.

Email:

Address:University of Central Florida, , , Orlando, Florida, Florida, United States, 32816





Agenda

4:45 PM Refreshments and Networking

5:00 PM Seminar

in ECE 202

All Welcome: You don't have to be an IEEE Member to attend.