Avoid Design Problems Using Worst Case Analysis Calculations

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As a design engineer how do we avoid getting a call on a Friday afternoon, telling us that the circuit we
designed is failing in production test, and the line is shut down? This happens in manufacturing all too
often, because of part tolerances, and poor design fundamentals. To most of us this is a nightmare
scenario, but it doesn’t have to be. You can avoid this scenario by understanding the key
parameters/tolerances of the components being used in the circuitry you are designing, and how to
perform worst case analysis on that circuitry. Using design examples we will go through in detail what to
analyze, and how to perform the calculations. The discussion will include detail on op-amps, voltage
regulators, resistors, capacitors, MOSFET’s, diodes, and generalized IC’s.



  Date and Time

  Location

  Hosts

  Registration



  • Date: 03 Nov 2022
  • Time: 04:00 PM to 05:00 PM
  • All times are (UTC-05:00) Eastern Time (US & Canada)
  • Add_To_Calendar_icon Add Event to Calendar
  • 110 Motor Parkway
  • Hauppauge, New York
  • United States
  • Building: Hauppauge Radisson

  • Starts 01 November 2022 01:38 PM
  • Ends 03 November 2022 01:38 PM
  • All times are (UTC-05:00) Eastern Time (US & Canada)
  • No Admission Charge


  Speakers

Louis Diana of TI

Topic:

How to Avoid Problems by using WCCA Calculations

https://www.ieee.li/pdf/viewgraphs/avoid-design-problems-using-worst-case-analysis-calculations.pdf

Biography:

Louis Diana is an Analog Field Application engineer for TI. Lou joined TI in 2004 and has more than 30
years of design experience. Before coming to TI, he designed power systems for space satellites. Lou
earned his BSEE from New York Institute of Technology, and completed 90% of his MSEE from New York
Polytechnic University. He presented numerous design seminars and conference papers, and is holder of
two US patents
.