75th Year of Transistor: Dielectrics that Moved the CMOS Scaling Forward
MOS-Transistor transformation from the planar to the 3d short channel geometries
Evolution of dielectric science
Transistors: 75 years
Brief history of the Transistor
modern MOSFETs
Short channel MOSFETs
the future of MOSFEts
Date and Time
Location
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- Date: 30 Mar 2023
- Time: 04:00 PM UTC to 05:00 PM UTC
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- 204 Monroe Avenue
- Physics & Engineering Dept
- Scranton, Pennsylvania
- United States 18510
- Building: Loyola Science Center (LSC)
- Room Number: 334
- Contact Event Hosts
- Co-sponsored by EDS Student Branch, Physics & Engineering Dept, University of Scranton
Speakers
Dr Durga Misra of Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ 07102
75th Year of Transistor: Dielectrics that Moved the CMOS Scaling Forward
Historically SiO2 was the main driver as the MOS transistor gate dielectric in CMOS technology. Once the thickness of SiO2 reached the onset of direct tunneling region (<1.5 nm) HfO2 -based high-k insulators were introduced to suppress the direct-tunneling leakage current. The evolution of dielectric science in nanoelectronics will be presented. The transistor has transformed from a planar device to a three-dimensional device (FinFET) to a gate all around (GAAFET) device. Several applications of high-k dielectrics have emerged including ferroelectric FETs and resistive random-access memory (RRAM) devices that are being investigated for possible implementation of in-memory and artificial intelligence hardware. The electrical performance in these devices depends on the dielectric deposition process, precise selection of deposition parameters, pre-deposition surface treatments and subsequent thermal budget. The deposition of high-k on both silicon and germanium, a higher mobility channel material, will be discussed. Furthermore, the switching mechanism in transition metal oxides like HfO2 in RRAM devices, where a conducting filament path is formed due to oxygen vacancy transition/formation, will also be discussed
Biography:
Prof. Durga Misra is a Professor and the Chair of the ECE Department at New Jersey Institute of Technology. His research interests are in the areas of nanometer CMOS gate stacks and application of high-k gate dielectrics for RRAM devices. He is Fellow of IEEE and is a Distinguished Lecturer of IEEE EDS. He is, also, a Fellow of the Electrochemical Society (ECS). He received the Thomas Collinan Award from the DS&T Division and the EPD Divisional Award from ECS. He has edited more than 50 books and conference proceedings and published more than 200 technical articles in peer reviewed Journals and in International Conference proceedings. He received the M.S. and Ph.D. degrees in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 1985 and 1988, respectively.
Address:EE Dept, NJIT,