CASS Outreach Round One: Fundamentals and Analogies for Low-Power CMOS Image Sensor Design

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Hello again! The IEEE Columbus Joint Chapter of the Solid-State Circuits and Circuits and Systems Societies is back with an exciting series of lectures given by distinguished lecturers. The first of this series will be on Innovative Low-Power CMOS Image Sensor Design by Prof. Suat Ay from the University of Idaho. This talk will be fully catered and will include around an hour of lecture as well as an additional hour for questions, discussion, and networking. See below for more details on the talk and the distinguished speaker.



  Date and Time

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  • Date: 27 Jun 2023
  • Time: 06:00 PM to 08:00 PM
  • All times are (UTC-04:00) Eastern Time (US & Canada)
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  • 1275 Kinnear Rd
  • Columbus, Ohio
  • United States 43212
  • Building: Rev1 Ventures
  • Room Number: 200

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  • Starts 11 June 2023 04:00 PM
  • Ends 27 June 2023 08:00 PM
  • All times are (UTC-04:00) Eastern Time (US & Canada)
  • No Admission Charge


  Speakers

Suat Suat of The University of Idaho

Topic:

Fundamentals and Analogies for Low-Power CMOS Image Sensor Design

Numerous sensor applications call for integrated sensors and electronics that can function in harsh, isolated environments without the need to change power sources (such as batteries). As a result, these sensors and systems need to be very energy-efficient while still delivering the functionality and performance required. Even if the most energy-efficient sensors and electronics are used, the operating lifetime of these systems is constrained because the amount of energy that can be stored on power sources is limited. This restriction could only be removed if environmental energy is "effectively" harvested to support the power sources.

In this talk, the "Supply Boosting Technique (SBT)" will be introduced as a low-power/low-voltage circuit design technique, from conceptualization (using analogies) to its use in low-power CMOS image sensors.

Biography:

Dr. Ay received his M.S. and Ph.D. degrees in Electrical Engineering-Electrophysics from the University of Southern California (USC), Los Angeles, CA, in 1997 and 2004, respectively. Between 1997 and 2007, he was employed as a VLSI Design Engineer in the semiconductor sector, with a focus on CMOS image sensors and mixed-signal VLSI design. He worked for Photobit Corp. which later became the Imaging Division of Micron Technology Inc. in 2001, Aptina Imaging in 2008, and acquired by On Semiconductor in 2014. He joined the Department of Electrical and Computer Engineering at the University of Idaho, Moscow, Idaho (USA) in 2007 as Assistant Professor and promoted to Associate Professor in 2013.

His research focuses on designing reconfigurable, secure, and robust electro-optical circuits and systems, analog and mixed-signal VLSI integrated circuits (ICs) for new classes of baseband and RF systems, intelligent sensors and microsystems, self-sustaining and smart CMOS sensors for wireless systems, Internet of Things (IoT) systems, implantable biomedical devices, and micro/nano fluidic devices, as well as next-generation CMOS image sensors.

He is a senior member of the IEEE, and member of SPIE societies.

Email:

Address:875 Perimeter Drive, , Moscow, United States, 83844





Agenda

Short Introduction (5 min)

Technical Talk (60 minutes)

Questions (10 minutes)

Refreshments and Social (30-60 minutes)



  Media

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