CANELOS: CAD and Nanoelectronics Seminar (Día 3)

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Este jueves 29 y viernes 30 de junio continúa CANELOS, el nuevo seminario que busca convocar a toda la comunidad de microelectrónica de Chile.


CANELOS es un evento enfocado en la microelectrónica y su industria, abordando tanto el diseño de circuitos integrados como la automatización y las herramientas de diseño asistido. El seminario se realizará los días 16, 29 y 30 de junio, en el maravilloso campus de la UTFSM en Valparaíso. Serán 3 días que incluyen charlas plenarias, presentaciones y un foro. Los charlistas son académicos y representantes de empresas, varios de los cuales viajarán desde el extranjero. 

El evento es abierto y gratuito, y busca reunir presencialmente a la comunidad de microelectrónica de todo el país, así como a contactos en latinoamérica. Se trata de una instancia con enfoque educativo, pero también una oportunidad de generar contactos con la academia y la industria. El futuro de la microelectrónica nacional será un tema recurrente en las conversaciones, y también la pregunta que trataremos de resolver durante el foro. 



  Date and Time

  Location

  Hosts

  Registration



  • Date: 30 Jun 2023
  • Time: 09:00 AM to 06:00 PM
  • All times are (UTC-04:00) Santiago
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  • UTFSM, Av. España #1680
  • Valparaiso, Valparaiso
  • Chile 2390123
  • Building: T

  • Contact Event Hosts
  • Co-sponsored by AC3E, Departamento de Electrónica de La UTFSM


  Speakers

Guillermo Guichal of Rydev, EmTech

Topic:

Rydev: Experiencia de outsourcing de servicios de ASIC desde Latinoamérica

El CEO de la empresa Rydev presentará la experiencia de esta empresa ofreciendo servicios de diseño de ASIC desde distintos países de Latinoamérica hacia el mundo.

Dr. Videnovic-Misic of Infineon Technologies

Topic:

Bridging the Analog Gap with Disruptive Methodologies

How can we improve designer productivity and bridge the gap with the increasing complexity of analog integrated circuit (IC) design?
In order to answer this rhetorical question, it helps to note that several manual time-consuming steps remain in the design flow. These include technology porting and stressful last-minute changes to the design. Is it time to offload such tasks to a machine, so that the human engineer may focus his or her mental energy on innovative tasks.
At Infineon Technologies, the AnaGen (Analog Generators) team is pursuing programmatic and AI-assisted analog and mixed-signal (AMS) IC design approaches as a step to bridge the analog design gap.
This is a challenge that can only be pursued by engineers open to disruptive methods. The Infineon Anagen team is part of the MOSAIC group and is fully engaged with the open-source community (MOSAIC stands for Modular Open-Source Analog IC framework).
In this talk, the current status of several promising programmatic AMS-IC design frameworks will be presented. These include BAG3, MOSAIC. Virtuoso_template and MOSIAC os_db_template. Early investigations completed at Infineon will be shown

Biography:

Mirjana Videnovic-Misic graduated from Faculty of Technical Sciences, University of Novi Sad, Serbia where she founded the Team for analog and radio-frequency IC design (ICreate) in 2009 and joined as assistant professor in 2010.
From 2014-2015 she was Fulbright Visiting Scholar at UC Berkeley and from 2015-2018 she was Marie Currie Individual Global Fellowship recipient in collaboration with UC Berkeley and ST Microelectronics.

From 2018-2022 Mirjana was with Silicon Austria Labs and technical lead for new IC design methodologies. From October 2022 she is member of Anagen team at Infineon Technologies as the Implementation lead.

Mirjana is a big proponent of an open-source as a way to bring IC design closer to young people and bring new skills into the IC domain. She is also a member of the IEEE SSCS Technical Committee on the Open Source Ecosystem.


Dr. Hanh-Phuc Le of University of California San Diego

Topic:

Next-Generation Circuit Architectures for Power-Supply on Chip (PwrSoC)

The need for an efficient power management solution has never been more critical across virtually all electronic devices and systems from low power to high power, smartphones to data centers, battery-powered components to renewable-energy-powered grids, and from stationary systems to aircraft. The key, common challenge for power management in these systems is to satisfy increasingly demanding requirements in terms of efficiency, size, reliability, and cost, simultaneously. This talk will present a unique flow of integrated power converter architectures, topologies, and circuit techniques to address this challenge. Particularly, the speaker will discuss his group research work on a family of hybrid converters that achieve high efficiency for high output power density and current density.

Biography:

Dr. Hanh-Phuc Le is an Assistant Professor of ECE at the University of California San Diego and a co-Director of the Power Management Integration Center, an NSF IUCRC center. He received the Ph.D. degree from UC Berkeley (2013), M.S. from KAIST, Korea (2006), and B.S. from Hanoi University of Science and Technology in Vietnam (2003), all in Electrical Engineering. In 2012, he co-founded and served as the CTO at Lion Semiconductor until October 2015. The company was acquired by Cirrus Logic in 2021. He was with the University of Colorado Boulder from 2016 to 2019, before joining the ECE department at UC San Diego. He held R&D positions at Oracle, Intel, Rambus, JDA Tech in Korea and the Vietnam Academy of Science and Technology (VAST) in Vietnam. His current research interests include miniaturized/on-die power conversions, large conversion ratios, smart power delivery and control for high performance IT systems, data centers, telecommunication, robots, automotive, mobile, wearable, and IoT applications. 

Dr. Le received a 2021 NSF CAREER Award, a 2012-2013 IEEE Solid-State Circuits Society Pre-doctoral Achievement Award, and UC Berkeley's 2013 Sevin Rosen Funds Award for Innovation. He authored three book chapters, over fifty journal and conference papers with one best paper award, recognized in various topics in the area of integrated power electronics. He is an inventor with 21 U.S. patents (11 granted and 10 pending). He serves as an associate editor of the IEEE Journal of Emerging and Selected Topics in Power Electronics (JESTPE), TPC Chair/co-chair for the International Workshop on Power Supply On Chip (PwrSoC 2018, 2020), and Chair of the Power Management and Outreach Subcommittees at the IEEE Custom Integrated Circuits Conference  (2020, 2021), and Vice Chair of the Energy Conversion Congress and Exposition (ECCE) 2021. He is also the Chair of the IEEE Power Electronics Society Technical Committee on Power Components, Integration, and Power ICs (IEEE PELS TC2). Dr. Le is an IEEE Senior Member.

Raúl Camposano of Silvaco

Topic:

The Electronic Design Automation Industry in the Context of the Semiconductor Industry

The Electronic Design Automation (EDA) industry plays a pivotal role in driving innovation and efficiency within the semiconductor industry. This talk aims to provide an overview of the EDA industry and its significance in the context of the rapidly evolving semiconductor landscape. The topics discussed include an overview of the semiconductor industry, both from a technical and a business perspective, touching also on the key vectors of innovation. With EDA accounting for approximately 2% of the semiconductor market size, its importance as an enabler cannot be overstated. The talk traces the history of EDA, highlighting significant advancements and milestones, and surveys the current state of the industry. Participants will gain a comprehensive understanding of the EDA industry's integral role within the semiconductor ecosystem and gain insights into the challenges, trends, and opportunities that lie ahead.

Biography:

Raúl Camposano is currently the CTO of Silvaco. He is also an Adjunct Lecturer at Stanford University and a partner at Silicon Catalyst, an incubator for semiconductor solutions. He was previously the CEO of Nimbic, a startup that was acquired by Mentor Graphics in 2014. From 1994 to 2007 he was with Synopsys, where he served as Chief Technology Officer, Senior Vice President, and General Manager. Prior to joining Synopsys, Camposano was a Director for the German National Research Center for Computer Science, Professor of Computer Science at the University of Paderborn, and a Research Staff Member at the IBM T.J. Watson Research Center. He holds a B.S and M.S. in Electrical Engineering from the University of Chile, and a Ph.D. in Computer Science from the University of Karlsruhe. He has published over 70 technical papers and written and/or edited three books on electronic design automation. Camposano has contributed significantly to building the design community serving on numerous editorial, advisory and company boards. He was also an Advisory Professor at Fudan University and the Chinese Academy of Sciences. He was elected a Fellow of the IEEE in 1999 and to the board of directors of EDAC (the EDA Consortium) in 2012. 


Gerardo Leon of Synopsis

Topic:

Synopsis

 Charla de la empresa Synopsys sobre el trabajo que realizan desde su oficina en Chile.





Agenda

9:00 - 9:45-> "Rydev: Experiencia de outsourcing de servicios de ASIC desde Latinoamérico". En español.

9:45 - 10:45 -> Mirjana Vicenovic-Misic: "Bridging the Analog Gap with Disruptive Methologies". En ingles.

11:00 - 12:15 -> Hanh-Phuc Le: "Next-Generation Circuit Architectures for Power-Supply on Chip". En inglés.

12:1 5 - 13:00 -> "Timeless Integrated Circuits". En español.

14:30 - 15:45 -> Raúl Camposano: "The EDA Industry in the Context of the Semiconductor Industry". En inglés.

15:45 - 16:30 ->  Synopsys. En español.

16:45 - 17:30 -> Foro: "Oportunidades en Microelectrónica para Estudiantes y la Industria Nacional". En español.

17:30 - 18:15 -> Clausura. En español.



Si te interesan los circuitos integrados o las herramientas de diseño asistido, no te pierdas las charlas de nuestros distinguidos invitados. Algunas presentaciones serán transmitidas vía Zoom.