Physics and modeling of 2D Semiconductor Field Effect Transistors
IEEE EDS - Eighth Mexico Technical Meeting 2023 (MTM_8-2023)
Mexico Chapter and CINVESTAV-IPN Student Branch Chapter
Center for Research and Advanced Studies of the National Polytechnic Institute
On the behalf of the Eighth IEEE-EDS Mexico Technical Meeting 2023 (MTM_8-2023), organized jointly by the IEEE EDS CINVESTAV-IPN Student Branch Chapter from the Section of Solid-State Electronics at the Center for Research and Advanced Studies of the Polytechnic National Institute (CINVESTAV-IPN), we extend the invitation for the conference with an IEEE-EDS Distinguished Lecturer, that presents his most recent results about several issues on Physics and modeling of 2D Semiconductor Field Effect Transistors
The MTM_8-2023 will be held SEES Bunker room at July 5th, 2023
Date and Time
Location
Hosts
Registration
- Date: 05 Jul 2023
- Time: 11:00 AM to 01:00 PM
- All times are (UTC-06:00) Guadalajara
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- Av. Instituto Politécnico Nacional 2508
- Col. San Pedro Zacatenco
- Ciudad de México, Distrito Federal
- Mexico 07360
- Building: Aula Bunker, SEES
- Click here for Map
- Contact Event Hosts
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M.C. Luz Balcazar; iq.maggy_@hotmail.com Tel. 57473800 Ext. 6265
Ing. Abril Garcia; abril.garcia.soriano@cinvestav.mx Tel. 57473800 Ext. 6265
- Co-sponsored by Center for Research and Advanced Studies of the National Polytechnique Institute, CINVESTAV-IPN.
- Survey: Fill out the survey
- Starts 29 June 2023 11:28 AM
- Ends 05 July 2023 01:30 PM
- All times are (UTC-06:00) Guadalajara
- No Admission Charge
Speakers
Prof. Benjamin Iñiguez of Universidad Rovira i Virgili
Physics and modeling of 2D Semiconductor Field Effect Transistors
2D semiconductors working as conducting channels in Field Effect Transistors (FETs) have been under research in the last years as an alternative to Si for nanoscale transistors. Moreover, compared to graphene devices, 2D semiconcuctor FETs offer the advantage of semiconductor properties, which allow them to be used as essential components in logic integrated circuits. The small thickness for 2D semiconductors enables the ultimate scalability in FETs, due to a higher gate electrostatic controllability over the channel and, compared to 3D gate structures, 2D semiconductor FETs it shows less parasitic effects. To use those new devices in VLSI circuits, suitable compact models need to be developed. We review the physics and the operation of different architectures of 2D semiconductor FETs and techniques to develop analytical equations of the I-V and C-V characteristics.
Biography:
Prof. Benjamin Iñiguez received the Ph D. Degree in Physics from the Universitat de les Illes Balears (Spain) in 1996. He worked as a Postdoctoral Scientist in the Rensselaer Polytechnic Institute (Troy, NY, USA, 1997-98), and in the Université catholique de Louvain (Louvain-la-Neuve, Belgium, 1998-2001) In 2001 he joined the University Rovira i Virgili, Tarragona, Spain, as an Titular Professor, becoming Full Professor in 2010. His main research interest is the development of CAD models and parameter extraction techniques for advanced electron devices.
He has been co-author of leading author of some of the compact models currently available in CAD tools: the so-called RPI models of a-Si:H and polycrystalline Si Thin Film Transistors (TFTs), the so-called ASM GaN HEMT model or the “MOTFT” amorphous oxide TFT model. He also led the development of the first compact models for several emerging devices,. He has published more than 180 papers in international journals (many of them in EDS ones) and presented more than 190 talks in international conferences. He coordinated two European Union-funded projects and participated or participates as team leader in seven more. He obtained the Award from the Catalan Government for the Promotion of University Research in 2004, and the ICREA Academia Award (ICREA Institute, Catalonia) in 2009 and 2014. In 2019 he was elected IEEE Fellow.
He is Member at Large of the Board of Governors (BoG) of IEEE EDS since 2018, Chair of the EDS SRC Region 8 since January 2023, Chair of the ED Spain Chapter between 2019 and 2022, Vice-, Editor of IEEE Transactions on Electron Devices since 2016, and Chair of the EDS Compact Modeling Technical Committee between 2017 and 2021). He was the Editor in Chief of Special Issues in EDS journals. He was the General Chair of nine international conferences and workshops, four international summer schools and thirteen EDS-sponsored Mini-Colloquia. He has supervised or co-supervised 18 Doctoral Thesis.
Email:
Address:Avinguda dels Països Catalans, 24 43006- Tarragona (Tarragona), Eng. Electrònica, Elèctrica i Automàtica, Tarragona, Cataluna, Spain, 43006
Agenda
Schedule Tuesday 5th—SEES Bunker room Speaker
11:00 - 11:10 Presentation of Prof. Benjamin Iñiguez Prof. Magali Estrada
11:10 - 13:00 Physics and modeling of 2D Semiconductor Field Effect Transistors Prof. Benjamin Iñiguez
MTM_8-2023 is an IEEE-EDS sponsored technichal meeting.
Sponsored by the IEEE Electron Devices Society under its Distinguished Lecturer Program