An Analog Compute Engine with Multi-Level Cell ReRAM lecture by Mike Flynn
An Analog Compute Engine with Multi-Level Cell ReRAM
The explosion in AI and machine learning is driving the need for efficient matrix operations. In particular, convolutional neural networks (CNNs) depend on large-scale vector-matrix multiplication (VMM). GPUs are an excellent choice for this task because they are much more efficient than CPUs. Nevertheless, GPU systems are still energy-intensive and, therefore, prohibitive for energy-constrained applications. As AI becomes a more prominent component of computing it is vital to improve its energy efficiency. Energy efficiency is particularly important for energy-constrained edge devices. The slowdown in scaling and the end of Moore’s Law make it urgent to find new approaches.
Analog compute in memory with Multi-Level Cell (MLC) ReRAM promises highly dense and efficient compute support for machine learning and scientific computing. We present an SoC prototype comprised of four self-contained ReRAM- based CIM tiles and a RISC-V host. The measured raw and normalized peak efficiencies are 20.7 and 662 TOPS/W, respectively. The compute density is 8.4 TOPS/mm2.
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- Tyndall National Institute, Lee Maltings Complex Dyke Parade
- Cork, Cork
- Ireland
- Building: BLOCK B
- Room Number: B.0.17
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- Co-sponsored by Tyndall National Institute
Speakers
Michael Flynn
In Memory Analog Compute
Biography:
Michael P. Flynn received the Ph.D. degree from Carnegie Mellon University in 1995. From 1988 to 1991, he was with the National Microelectronics Research Centre in Cork, Ireland. He was with National Semiconductor in Santa Clara, CA, from 1993 to 1995. From 1995 to 1997, he was a Member of Technical Staff with Texas Instruments, Dallas, TX. During the four-year period from 1997 to 2001, he was with Parthus Technologies, Cork, Ireland. Dr. Flynn joined the University of Michigan in 2001, and is currently Professor and the Fawwaz T Ulaby Collegiate Professor of Electrical and Computer Engineering and Professor of Electrical Engineering and Computer Science.
Michael Flynn is a 2008 Guggenheim Fellow. He received 2020 Rackham Distinguished Graduate Mentoring Award and the 2016 University of Michigan Faculty Achievement Award. He is a recipient of the 2020 Intel Outstanding Researcher Award. Flynn received the 2011 Education Excellence Award and the 2010 College of Engineering Ted Kennedy Family Team Excellence Award from the College from Engineering at the University of Michigan. He received the 2005-2006 Outstanding Achievement Award from the Department of Electrical Engineering and Computer Science at the University of Michigan. He received the NSF Early Career Award in 2004. He is a recipient of the 2023 IEEE Brokaw Award for Circuit Elegance.
Dr. Flynn was Editor-in-Chief of the IEEE Journal of Solid State Circuits from 2013 to 2016. He is a former Distinguished Lecturer of the IEEE Solid-State Circuits Society. He served as Associate Editor of the IEEE Journal of Solid State Circuits (JSSC) and of the IEEE Transactions on Circuits and Systems. He served on Technical Program Committees of the International Solid State Circuits (ISSSC), the Symposium on VLSI Circuits, the European Solid State Circuits Conference (ESSCIRC) and the Asian Solid-State Circuits Conference (ASSCC). He was sub-committee chair for data conversion at ISSCC from 2018 to 2022.
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