Keynote Speech Prof. Izzet Kale (University of Westminster) - Balanced Model Truncation and its Practical Real-World Applications

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IEEE ICTfest 2023


This talk will look into the theoretical foundations of Balanced Model Truncation (BMT) which has its origins in the Control Engineering literature, and cover the practical implementation steps, with a view to deploying it in real-world DSP applications.

The speaker will provide a number of examples from the use of the BMT technique, in actual product design and development, from project undertaken for various sectors of industry, where the BMT technique has made a very substantial difference in system order reduction as well as complexity reduction, which resulted in substantial footprint and power reduction in the actual circuit level implementations.



  Date and Time

  Location

  Hosts

  Registration



  • Date: 05 Oct 2023
  • Time: 09:00 AM to 10:30 AM
  • All times are (UTC+03:00) Riga
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  • Paula Valdena iela
  • Riga, Latvia
  • Latvia
  • Building: 5

  • Contact Event Hosts
  • Chair: Anna Litviņenko
    Technical co-chair: Andrejs Romanovs and Nadezda Kunicina

  • Co-sponsored by Riga Technical University, RTU Institute of Information Technology and RTU Institute of Microwave Engineering and Electronics;
  • Survey: Fill out the survey
  • Starts 08 September 2023 02:34 PM
  • Ends 05 October 2023 11:59 PM
  • All times are (UTC+03:00) Riga
  • No Admission Charge


  Speakers

Prof. Izzet Kale Prof. Izzet Kale

Topic:

Balanced Model Truncation and its Practical Real-World Applications

This talk will look into the theoretical foundations of Balanced Model Truncation (BMT) which has its origins in the Control Engineering literature, and cover the practical implementation steps, with a view to deploying it in real-world DSP applications.

The speaker will provide a number of examples from the use of the BMT technique, in actual product design and development, from project undertaken for various sectors of industry, where the BMT technique has made a very substantial difference in system order reduction as well as complexity reduction, which resulted in substantial footprint and power reduction in the actual circuit level implementations.

Biography:

Kale is currently Professor Emeritus of Applied DSP and VLSI Systems, and Hon. Director of the Applied DSP and VLSI Research Group (ADVRG) at the University of Westminster which he founded in the late eighties. He is also Chair of the IEEE UK and Ireland Section, the largest IEEE Section in the World.
With his group, he has undertaken numerous next generation product oriented applied research and development projects/contracts for European, US and Japanese corporations, which have led to several consumer electronic ICs, systems and products for the telecommunications, aerospace and biomedical sectors.
Kale, is a nationally and internationally known and respected authority with nearly 40 years of experience in the design and implementation of reduced complexity low-ultra-low-power systems for a variety of applications including but not limited to sensors and sensor networks, communications systems, satellite payloads, embedded systems, biomedical instrumentation and diagnostic systems and real-time DSP Systems,  with  a significant effort currently in biomedical sensors and instrumentation for rapid diagnosis applications.

He has also spearheaded ground-breaking work in DSP as well as mixed-signal VLSI systems and their IC implementations, mainly in collaboration with industry for their next generation low-power systems and IC products.
He has led many Industry and Research Council sponsored, National, European and International  Applied R&D projects as the PI with a very significant project and engineering team management experience, targeting next generation product development and has a 100% track record for timely delivery of outputs to aggressive commercially set deadlines to meet time to market product development cycles for Industry, predominantly in the Biomedical, Sensors and Interfaces, Communications and Satellite sectors.
His research and teaching interests include; digital and analogue signal processing, silicon circuit and system design, digital filter design and implementation, embedded ultra-low-power intelligent systems for IoT sensor networks for biomedical applications, ultra-low-power processing and processor structures for secure communications and transactions for NFC applications, novel ultra-low-power signal processing structures (for use in stringent filtering applications in biomedical such as ECG/EEG applications); real-time solutions for receiver implementation based on data converter and  high-speed  DSP  architectures; high speed, wide bandwidth,high resolution data converters; computationally efficient digital receiver architectures for software defined DAB and GPS, onboard satellite power aware and low-power processor and processing engines for commercial satellites, notably through European Space Agency sponsorship in collaboration with Airbus Defence and Space (formerly EADS Astrium). A notable project here is the European Union sponsored AF3 (Automated Forest Fire Fighting)  Project where Kale’s Team developed novel deploy and forget environment monitoring IoT connected embedded intelligent, power aware, self-powered sensor nodes and networks with onboard computational intelligence and self-configuration and Networking capabilities deploying elements of the ADVRG’s Configurable Ultra-Low-Power (CULP) processor IP.
Kale authored and co-authored, ~400 technical papers, 3 books, 11 patents, supervised and co-supervised 39 PhD students to successful completion, examined another 70+ Nationally and Internationally. He has also organised and Chaired several Conferences and Workshops and Special Sessions as General Chair and Co-Chair, served on program Committees and continues to do so.

He is currently working on the efficient implementation of low-power DSP algorithms, circuits and systems, architectures and processors and Sigma-Delta modulator structures for deployment in biomedical sensors and instrumentation as well as complexity and power reduced Satellite payload Systems.

Address:University of Westminster, , London, United Kingdom





Agenda

5th October, Paula Valdena street 5, Riga

9:00 - 2  Keynote speeches  
Prof. Oscar Quevedo-Teruel (Sweden)  - A fast ray-tracing code for the simulation of lens antennas

Prof. Izzet Kale (UK) - Balanced Model Truncation and its Practical Real-World Applications
10:30 - Coffee break
11:00 - MTTW Workshop sessions (in person) / ITMS conference sessions (online)
13:30 – Lunch Break
14:30 - MTTW Workshop sessions (in person)  / ITMS conference sessions (online)
16:30 - Coffee break
17:00 - MTTW Workshop sessions (in person)  / ITMS conference sessions (online)
19:00 – Gala Dinner for presenters



IEEE ICTfest 2023