STMicroelectronics online lectures in association with SemiX IIT Bombay

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STMicroelectronics online lectures in association with SemiX IIT Bombay


Greetings from the Center for Semiconductor Technologies (SemiX) at IIT Bombay!

STMicroelectronics is organizing online lectures in association with SemiX IIT Bombay on the coming Wednesday, i.e., 11th October 2023. It is online and free of any participation fee.

Mode: Online on MS Teams

Date:11.10.2023

Time: 2:30 - 5:00 pm

 

Lecture 1 : Introduction to Verification Techniques for SOC design - Session 1

This session will discuss verification methodology, project management challenges, trends and research areas in verification.

Speaker bio: Ashish Kumar Sharma, Head IP Sourcing - MDG GPM IDC, STMicroelectronics, India 

Ashish is managing IP Sourcing for General Purpose Micro (GPM) products in ST, Greater Noida. With 22+ years of experience, he has experience doing things in verification, design, architecture domain from scratch. He has deep expertise in architecture definition, planning, execution, resource management, risk mitigation, strategy loop development and deployment, cross functional working with various stakeholders, customer interaction, managing teams across different sites. A recognized leader is a pro on cross vertical coherence, diversity, collaborative leadership and deploying processes to attain reliability-repeatability-consistency and sustainability.

 

Lecture 2: Introduction to Verification Techniques for SOC design - Session 2

This session will discuss verification flow, testbench architecture, metric driven verification approach, what is gale level simulation and will explain verification approach through case study. 

Speaker bio: Himanshu Mittal, Verification Methodology Expert, AMS, STMicroelectronics, India

Himanshu Mittal joined ST in 2009 as his first company after completing his B. Tech in Electronics and Communication Engineering from NIT Warangal. He has 13+ years of experience in Front-End Design Flow, has experience in RTL design and verification, defining testbench architecture. Himanshu is currently responsible for defining verification methodology for AMS-ACD group and managing verification activities for custom chips like wireless charger, open RF standards, display drivers and PMICs.

Link for registration: https://events.teams.microsoft.com/event/2d5b1495-7d6b-4fd8-a4c6-3edb636c6874@403ee5f4-55b3-45cd-8ae2-824be887a075



  Date and Time

  Location

  Hosts

  Registration



  • Date: 11 Oct 2023
  • Time: 02:30 PM to 05:00 PM
  • All times are (UTC+05:30) Chennai
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  • Contact Event Hosts
  • Prof Sandip Mondal, PhD
    IIT Bombay, Mumbai 400076
     
  • Co-sponsored by Semix Office IIT Bombay