Dr. Firooz Aflatouni of University of Pennsylvania, Philadelphia

The typical hardware platform for neural networks operates based on clocked computation and consists of advanced parallel graphics processing units (GPU) and/or application specific integrated circuits (ASIC), which are reconfigurable, multi-purpose and robust. However, for such platforms the input data often needs to be converted to electrical domain, digitized, and stored. Furthermore, a clocked computation system typically has a high power consumption, suffers from a limited speed, and requires a large data storage device. To address the ever-increasing demand for more sophisticated and complex AI based systems, deeper neural networks with a large number of layers and neurons are required, which result in even higher power consumption and longer computation time. Photonic deep networks could address some of these challenges by utilizing the large bandwidth available around the optical carrier and low propagation loss of CMOS-compatible photonic devices and blocks. In this talk, a low-cost integrated highly-scalable photonic architecture for implementation of deep neural networks for image/video/signal classification is presented, where the input images are taken using an array of pixels and directly processed in the optical domain. The implemented system performs computation by propagation and, as such, is several orders-of-magnitude faster than state-of-the-art clocked based systems and operates at a significantly lower power consumption. This system, which is scalable to a network with a large number of layers, performs in-domain processing (i.e. processing in the optical domain) and as a result, opto-electronic conversion, analog-to-digital conversion, and requirement for a large memory module are eliminated.

Biography:

Firooz Aflatouni (Senior Member, IEEE) received the Ph.D. degree in electrical engineering from the University of Southern California, Los Angeles, CA, USA, in 2011. In 1999, he co-founded Pardis Bargh Company, where he served as the CTO for five years working on the design and manufacturing of inclined-orbit satellite tracking systems. From 2004 to 2006, he was a Design Engineer with MediaWorks Integrated Circuits Inc., Irvine, CA. He was a Post-Doctoral Scholar with the Department of Electrical Engineering, California Institute of Technology, Pasadena, CA. He joined the University of Pennsylvania, Philadelphia, PA, USA, in 2014, where he is currently an Associate Professor with the Department of Electrical and Systems Engineering. His research interests include electronic–photonic co-design and low-power RF and millimeter-wave integrated circuits. Dr. Aflatouni received the 2020 Bell Labs Prize, the Young Investigator
Program (YIP) Award from the Office of Naval Research in 2019, the NASA Early Stage Innovation Award in 2019, and the 2015 IEEE Benjamin Franklin Key Award. He is a Distinguished Lecturer of the Solid-State Circuit Society and has served on several IEEE program committees (ISSCC, CICC, and IMS). He is an Associate Editor of the IEEE Open Journal of the Solid-State Circuits Society and currently serves as the chair of IEEE Solid State Circuits Society (SSCS) Philadelphia chapter.

Email:

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