Floating-Point Arithmetic and Brakefield’s Patent

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Jim Brakefield will attempt to give a balanced talk on computer floating-point arithmetic and his often cited patent  https://patents.google.com/patent/US5892697A/en  Method and apparatus for handling overflow and underflow in processing floating-point numbers:

Floating-point history and early issues

IEEE Standard 754, its goals and limitations

Motivation for Brakefield’s patent

Subsequent and current developments

Challenges are in the details or what can go wrong

Bio:

Jim Brakefield’s career started with degrees in Applied Math, EE and CS.  He has done various software, real-time embedded, image processing, circuit board design and FPGA projects.  He has done numerous presentations and talks.  He has taken and interest in computer architecture that continues to this day.  He is active in the IEEE Lone-star chapter.  Some further details at: https://github.com/jimbrake


  Date and Time

  Location

  Hosts

  Registration


  • Date: 06 Nov 2023
  • Time: 07:30 PM to 09:00 PM
  • All times are (UTC-06:00) Central Time (US & Canada)
  • Add_To_Calendar_icon Add Event to Calendar
  • One Camino Santa Maria
  • St. Mary's University
  • San Antonio, Texas
  • United States 78228
  • Building: University Center
  • Room Number: Alumni Conference Room
  • Contact Event Hosts
  • Starts 29 October 2023 10:29 PM
  • Ends 06 November 2023 07:20 PM
  • All times are (UTC-06:00) Central Time (US & Canada)
  • No Admission Charge




  Media

Various Floating-point Formats Sorted by radix, word size and computer name. 39.00 KiB
Correspondence with IEEE 854 committee Exhibits normalized gradual underflow and overflow. Committee response 162.47 KiB
Optimal Floating-point Format Formats that allow zero extension to lengthen and truncation to shorten both integer and floating point values 146.68 KiB
Slides for Floating-point & Brakefield's Patent Updated on Dec. 31, 2023 478.94 KiB